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Showing items 1-6 of 6 (1 Page(s) Totally)
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| 臺大學術典藏 |
2018-09-10T15:23:15Z |
Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits
|
Ho, K.-H.;Ou, H.-C.;Chang, Y.-W.;Tsao, H.-F.; Ho, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T15:23:15Z |
Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits
|
Ho, K.-H.;Ou, H.-C.;Chang, Y.-W.;Tsao, H.-F.; Ho, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:48:08Z |
Coupling-Aware length-ratio-matching routing for capacitor arrays in analog integrated circuits
|
Ho, K.-H.;Ou, H.-C.;Chang, Y.-W.;Tsao, H.-F.; Ho, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T09:48:08Z |
Coupling-Aware length-ratio-matching routing for capacitor arrays in analog integrated circuits
|
Ho, K.-H.;Ou, H.-C.;Chang, Y.-W.;Tsao, H.-F.; Ho, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T08:42:39Z |
A corner stitching compliant B-tree representation and its applications to analog placement
|
YAO-WEN CHANG; Tsao, H.-F.;Chou, P.-Y.;Huang, S.-L.;Chang, Y.-W.;Lin, M.P.-H.;Chen, D.-P.;Liu, D.; Tsao, H.-F.; Chou, P.-Y.; Huang, S.-L.; Chang, Y.-W.; Lin, M.P.-H.; Chen, D.-P.; Liu, D. |
| 臺大學術典藏 |
2018-09-10T08:42:39Z |
A corner stitching compliant B-tree representation and its applications to analog placement
|
YAO-WEN CHANG; Tsao, H.-F.;Chou, P.-Y.;Huang, S.-L.;Chang, Y.-W.;Lin, M.P.-H.;Chen, D.-P.;Liu, D.; Tsao, H.-F.; Chou, P.-Y.; Huang, S.-L.; Chang, Y.-W.; Lin, M.P.-H.; Chen, D.-P.; Liu, D. |
Showing items 1-6 of 6 (1 Page(s) Totally)
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