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Showing items 31-38 of 38 (2 Page(s) Totally) << < 1 2 View [10|25|50] records per page
國立臺灣大學 |
2007-02 |
Automated Technology for Verification and Analysis (ATVA 2005) - Preface
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Peled, D. A.; Tsay, Y. -K. |
國立臺灣大學 |
2000 |
Algorithmic Analysis of Programs with Well Quasi-Ordered Domains
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Abdulla, P. A.; Cerans, K.; Jonsson, B.; Tsay, Y.K. |
國立臺灣大學 |
1996-10 |
Assumption/Guarantee Specifications in Linear-Time Temporal Logic
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Jonsson, B.; Tsay, Y. -K. |
國立臺灣大學 |
1995-01 |
Deducing Fairness Properties in UNITY Logic - A New Completeness Result
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Tsay,Y. -K.; Bagrodia, R. L. |
臺大學術典藏 |
1995 |
Assumption/guarantee specifications in linear-time temporal logic
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Jonsson, B; Tsay, Y.-K.; YIH-KUEN TSAY; Jonsson, B;Tsay, Y.-K. |
國立臺灣大學 |
1994-07 |
Fault-Tolerant Algorithms for Fair Interprocess Synchronization
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Tsay, Y.-K.; Bagrodia, R. L. |
國立臺灣大學 |
1993-07 |
Some Impossibility Results in Interprocess Synchronization
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Tsay,Y. -K.; Bagrodia, R. L. |
臺大學術典藏 |
1992 |
A real-time algorithm for fair interprocess synchronization
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Tsay, Y.-K;Bagrodia, R.L.; Tsay, Y.-K; Bagrodia, R.L.; YIH-KUEN TSAY |
Showing items 31-38 of 38 (2 Page(s) Totally) << < 1 2 View [10|25|50] records per page
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