|
English
|
正體中文
|
简体中文
|
總筆數 :0
|
|
造訪人次 :
51049594
線上人數 :
1117
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"tseng po chih"的相關文件
顯示項目 41-48 / 48 (共2頁)
<< < 1 2
每頁顯示[10|25|50]項目
| 臺大學術典藏 |
2002-10 |
Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method
|
Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee; Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee |
| 國立臺灣大學 |
2002-05 |
Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2002-05 |
Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2001-06 |
CDSP: an application-specific digital signal processor for third generation wireless communications
|
Tseng, Po-Chih; Chen, Chi-Kuang; Chen, Liang-Gee |
| 國立臺灣大學 |
2001-06 |
H.26L intra mode encoder architecture for digital camera application
|
Wang, Tu-Chih; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2001-06 |
CDSP: an application-specific digital signal processor for third generation wireless communications
|
Tseng, Po-Chih; Chen, Chi-Kuang; Chen, Liang-Gee; Tseng, Po-Chih; Chen, Chi-Kuang; Chen, Liang-Gee |
| 臺大學術典藏 |
2001-06 |
H.26L intra mode encoder architecture for digital camera application
|
Chen, Liang-Gee; Tseng, Po-Chih; Wang, Tu-Chih; Wang, Tu-Chih; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2001 |
A digital signal processor with programmable correlator arrayarchitecture for third generation wireless communication system
|
Chen, Chi-Kuang; Tseng, Po-Chih; Chang, Yung-Chil; Chen, Liang-Gee |
顯示項目 41-48 / 48 (共2頁)
<< < 1 2
每頁顯示[10|25|50]項目
|
