| 國立臺灣大學 |
2005 |
VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
Reconfigurable discrete wavelet transform processor for heterogeneous reconfigurable multimedia systems
|
Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee |
| 國立臺灣大學 |
2005 |
Reconfigurable motion estimator for power-aware video coding systems
|
Chien, Shao-Yi; Lin, Chia-Ping; Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2005 |
Reconfigurable motion estimator for power-aware video coding systems
|
Chien, Shao-Yi; Lin, Chia-Ping; Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee; Chien, Shao-Yi; Lin, Chia-Ping; Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-08 |
Hardware architecture design for visual processing: present and future
|
Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2004-08 |
Hardware architecture design for visual processing: present and future
|
Tseng, Po-Chih; Chen, Liang-Gee; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Reconfigurable discrete cosine transform processor for object-based video signal processing
|
Tseng, Po-Chih; Haung, Chao-Tsung; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
B-spline factorization-based architecture for inverse discrete wavelet transform
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Memory analysis and architecture for two-dimensional discrete wavelet transform
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Low-power parallel tree architecture for full search block-matching motion estimation
|
Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2004-05 |
Reconfigurable discrete cosine transform processor for object-based video signal processing
|
Tseng, Po-Chih; Haung, Chao-Tsung; Chen, Liang-Gee; Tseng, Po-Chih; Haung, Chao-Tsung; Chen, Liang-Gee |
| 臺大學術典藏 |
2004-05 |
B-spline factorization-based architecture for inverse discrete wavelet transform
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2004-05 |
Low-power parallel tree architecture for full search block-matching motion estimation
|
Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee; Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-02 |
81MS/s JPEG2000 single-chip encoder with rate-distortion optimization
|
Fang, Hung-Chi; Huang, Chao-Tsung; Chang, Yu-Wei; Wang, Tu-Chih; Tseng, Po-Chih; Lian, Chung-Jr; Chen, Liang-Gee |
| 臺大學術典藏 |
2004-02 |
81MS/s JPEG2000 single-chip encoder with rate-distortion optimization
|
Fang, Hung-Chi; Huang, Chao-Tsung; Chang, Yu-Wei; Wang, Tu-Chih; Tseng, Po-Chih; Lian, Chung-Jr; Chen, Liang-Gee; Fang, Hung-Chi; Huang, Chao-Tsung; Chang, Yu-Wei; Wang, Tu-Chih; Tseng, Po-Chih; Lian, Chung-Jr; Chen, Liang-Gee |
| 國立臺灣大學 |
2004 |
Multi-mode content-aware motion estimation algorithm for power-aware video coding systems
|
Lin, Siou-Shen; Tseng, Po-Chih; Lin, Chia-Ping; Chen, Liang-Gee |
| 國立臺灣大學 |
2004 |
Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2004 |
Multi-mode content-aware motion estimation algorithm for power-aware video coding systems
|
Lin, Siou-Shen; Tseng, Po-Chih; Lin, Chia-Ping; Chen, Liang-Gee; Lin, Siou-Shen; Tseng, Po-Chih; Lin, Chia-Ping; Chen, Liang-Gee |
| 國立臺灣大學 |
2003-09 |
Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2003-09 |
Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2003-08 |
Perspectives of multimedia SoC
|
Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2003-08 |
VLSI architecture for discrete wavelet transform based on B-spline factorization
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2003-08 |
Reconfigurable discrete wavelet transform architecture for advanced multimedia systems
|
Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee |
| 臺大學術典藏 |
2003-08 |
Perspectives of multimedia SoC
|
Tseng, Po-Chih; Chen, Liang-Gee; Tseng, Po-Chih; Chen, Liang-Gee |