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| 臺大學術典藏 |
2003-08 |
VLSI architecture for discrete wavelet transform based on B-spline factorization
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2003-08 |
Reconfigurable discrete wavelet transform architecture for advanced multimedia systems
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Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee; Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee |
| 國立臺灣大學 |
2002-10 |
Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2002-10 |
Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method
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Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee |
| 臺大學術典藏 |
2002-10 |
Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2002-10 |
Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method
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Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee; Tseng, Po-Chih; Huang, Chao-Tsung; Chen, Liang-Gee |
| 國立臺灣大學 |
2002-05 |
Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2002-05 |
Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2001-06 |
CDSP: an application-specific digital signal processor for third generation wireless communications
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Tseng, Po-Chih; Chen, Chi-Kuang; Chen, Liang-Gee |
| 國立臺灣大學 |
2001-06 |
H.26L intra mode encoder architecture for digital camera application
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Wang, Tu-Chih; Tseng, Po-Chih; Chen, Liang-Gee |
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