臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
國立中山大學	2009	具有即時效能/功率監控功能的高效率可程式化三維電腦繪圖晶片系統---軟硬體開發及整合---子計畫四：三維電腦繪圖晶片系統之Vertex Shader 處理器設計(III)	蕭勝夫;莊作彬; Shen-Fu Hsiao;Tso-Bing Juang
國立中山大學	2007	具有即時效能/功率監控功能的高效率可程式化三維電腦繪圖晶片系統-軟硬體開發及整合---子計畫四：三維電腦繪圖晶片系統之Vertex Shader 處理器設計(I)	蕭勝夫; Shen-Fu Hsiao; 莊作彬; Tso-Bing Juang
國立中山大學	2005-08	Efficient VLSI Implementations of Fast Multiplierless Approximated DCT using Parameterized Hardware Modules	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang;Chung-Han Lee
國立中山大學	2005-07	A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai;Jeng-Hsiung Jan
國立中山大學	2005-06	Low-Error Carry-Free Fixed-Width Multipliers with Low-Cost Compensation Circuits	Tso-Bing Juang;Shen-Fu Hsiao
國立中山大學	2004-12	Low-error Carry-Free Fixed-Width Multipliers and Their Application to DCT/IDCT	Tso-Bing Juang; Shen-Fu Hsiao; Shiann-Rong Kuang; Ming-Yu Tsai
國立中山大學	2004-08	Para-CORDIC: Parallel CORDIC Rotation Algorithm	Tso-Bing Juang;Shen-Fu Hsiao;Ming-Yu Tsai
國立中山大學	2004-02	A Memory-Efficient and High-Speed Sine/Cosine Generator Based on Parallel CORDIC Rotations	Shen-Fu Hsiao;Yu-Hen Hu;Tso-Bing Juang
國立中山大學	2003-12	Design of Fixed-Length Multipliers Using Radix-2 Signed-Digit Redundant Numbers	Tso-Bing Juang; Shen-Fu Hsiao; Ming-Yu Tsai
國立中山大學	2003-08	A ROM-Free CORDIC-Based Sine/Cosine Function Generator Based on Concurrently Predicted Rotation Directions	Shen-Fu Hsiao; Tso-Bing Juang
國立中山大學	2002-12	Partitioning Methodology of the Final Adder in a Tree Structure Parallel Multiplier Generator	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2002-08	A High-Performance Function Generator for Multiplier-Based Arithmetic Operations	Tso-Bing Juang; Jeng-Hsin Jan; Ming-Yu Tsai; Shen-Fu Hsiao
國立中山大學	2001-08	Novel High-Performance and Area-Efficient D-Flip-Flop Circuits	Ming-Yu Tsai; Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	2001-08	A Multiplier-Based Arithmetic Function Generator for Digital Signal Processing Applications	Shen-Fu Hsiao; Tso-Bing Juang; Jeng Hsium Jan; Ming Yu Tsai
國立中山大學	2000-02	Discussions on the CORDIC Processor Using Leading Zero Detectors	Tso-Bing Juang; Shen-Fu Hsiao
國立中山大學	1999-08	A Low Power and Fast CORDIC Processor for Vector Rotation	Tso-Bing Juang; Shen-Fu Hsiao

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