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Taiwan Academic Institutional Repository >
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"tsung hsien lin"
Showing items 11-20 of 114 (12 Page(s) Totally)
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| 臺大學術典藏 |
2020-06-11T06:26:20Z |
A dynamic phase error compensation technique for fast-locking phase-locked loops
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Chiu, W.-H.;Huang, Y.-H.;Lin, T.-H.; Chiu, W.-H.; Huang, Y.-H.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:20Z |
Introduction to the special section on the 2011 Asian solid-state circuits conference (A-SSCC)
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Liu, S.-I.;Lin, T.-H.;Rhee, W.; Liu, S.-I.; Lin, T.-H.; Rhee, W.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:19Z |
EP2: Lost art? Analog tricks and techniques from the masters.
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Lin, Tsung-Hsien; Samori, Carlo; Schreier, Richard; TSUNG-HSIEN LIN; Lin, Tsung-Hsien;Samori, Carlo;Schreier, Richard |
| 臺大學術典藏 |
2020-06-11T06:26:19Z |
A wideband PLL-based G/FSK transmitter in 0.18 μm CMOS
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Liu, Y.-H.;Lin, T.-H.; Liu, Y.-H.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:19Z |
A 2-channel -83.2dB crosstalk 0.061mm 2 CCIA with an orthogonal frequency chopping technique
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Tsai, Y.-L.;Lee, F.-W.;Chen, T.-Y.;Lin, T.-H.; Tsai, Y.-L.; Lee, F.-W.; Chen, T.-Y.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:19Z |
An energy-efficient QPSK demodulation scheme with injection-locking technique for green radio communication
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Huang, F.-C.;Wang, B.-C.;Tsai, Y.-L.;Lin, T.-H.; Huang, F.-C.; Wang, B.-C.; Tsai, Y.-L.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:18Z |
A 135-μW 0.46-mΩ/√Hz thoracic impedance variance monitor with square-wave current modulation
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Tu, C.-C.;Lee, F.-W.;Yeih, D.-F.;Lin, T.-H.; Tu, C.-C.; Lee, F.-W.; Yeih, D.-F.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:18Z |
An area-efficient amplifier-less digitally-controlled li-ion battery charger in 0.35μm CMOS
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Lin, S.-Y.;Lin, T.-H.; Lin, S.-Y.; Lin, T.-H.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:18Z |
A 42-71 GHz 90 nm CMOS injection-locked voltage-controlled oscillator using bulk injection technique
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Lin, Y.-A.;Lin, T.-H.;Chang, H.-Y.; Lin, Y.-A.; Lin, T.-H.; Chang, H.-Y.; TSUNG-HSIEN LIN |
| 臺大學術典藏 |
2020-06-11T06:26:18Z |
A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS
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Chiu, W.-H.;Cheng, C.-Y.;Lin, T.-H.; Chiu, W.-H.; Cheng, C.-Y.; Lin, T.-H.; TSUNG-HSIEN LIN |
Showing items 11-20 of 114 (12 Page(s) Totally)
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