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| 國立交通大學 |
2017-04-21T06:49:05Z |
28nm Ultra-Low Power Near-/Sub- threshold First-In-First-Out (FIFO) Memory for Multi-Bio-Signal Sensing Platforms
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Hsu, Wei-Shen; Huang, Po-Tsang; Wu, Shang-Lin; Chuang, Ching-Te; Hwang, Wei; Tu, Ming-Hsien; Yin, Ming-Yu |
| 國立交通大學 |
2014-12-08T15:36:49Z |
40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist
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Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Chu, Yuan-Hua; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T08:29:40Z |
A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist
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Lu, Chien-Yu; Chuang, Ching-Te; Jou, Shyh-Jye; Tu, Ming-Hsien; Wu, Ya-Ping; Huang, Chung-Ping; Kan, Paul-Sen; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin |
| 國立交通大學 |
2014-12-08T15:29:40Z |
A 0.33-V, 500-kHz, 3.94-mu W 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist
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Lu, Chien-Yu; Tu, Ming-Hsien; Yang, Hao-I; Wu, Ya-Ping; Huang, Huan-Shun; Lin, Yuh-Jiun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:55:34Z |
A 0.35 V, 375 kHz, 5.43 mu W, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line
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Wu, Shang-Lin; Lu, Chien-Yu; Tu, Ming-Hsien; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:54:15Z |
A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist
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Wu, Shang-Lin; Li, Kuang-Yu; Huang, Po-Tsang; Hwang, Wei; Tu, Ming-Hsien; Lung, Sheng-Chi; Peng, Wei-Sheng; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:13Z |
A 40 nm 0.32 V 3.5 MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-Assist
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Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T11:20:58Z |
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
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Lien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control
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Liao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist
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Chang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang |
| 國立交通大學 |
2014-12-08T15:46:21Z |
A reconfigurable MAC architecture implemented with mixed-V(t) standard cell library
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Wang, Li-Rong; Chiu, Yi-Wei; Hu, Chia-Lin; Tu, Ming-Hsien; Jou, Shyh-Jye; Lee, Chung-Len |
| 國立交通大學 |
2014-12-08T15:23:11Z |
A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing
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Tu, Ming-Hsien; Lin, Jihi-Yu; Tsai, Ming-Chien; Lu, Chien-Yu; Lin, Yuh-Jiun; Wang, Meng-Hsueh; Huang, Huan-Shun; Lee, Kuen-Di; Shih, Wei-Chiang (Willis); Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-16T06:15:16Z |
ASYMMETRIC VIRTUAL-GROUND SINGLE-ENDED SRAM AND SYSTEM THEREOF
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JOU Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Tsai Ming-Chien |
| 國立交通大學 |
2014-12-08T15:19:40Z |
Asymmetrical Write-Assist for Single-Ended SRAM Operation
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Lin, Jihi-Yu; Tu, Ming-Hsien; Tsai, Ming-Chien; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-16T06:14:50Z |
CONTROL CIRCUIT OF SRAM AND OPERATING METHOD THEREOF
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CHUANG Ching-Te; LIEN Nan-Chun; LIAO Wei-Nan; CHU Li-Wei; CHANG Chi-Shin; TU Ming-Hsien |
| 國立交通大學 |
2014-12-16T06:15:25Z |
DISTURB-FREE STATIC RANDOM ACCESS MEMORY CELL
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Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu |
| 國立交通大學 |
2014-12-16T06:14:10Z |
Disturb-free static random access memory cell
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Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu |
| 國立交通大學 |
2014-12-16T06:13:49Z |
Oscillato based on a 6T SRAM for measuring the bias temperature instability
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Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:14:56Z |
Oscillator based on a 6T SRAM for measuring the Bias Temperature Instability
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Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:13:52Z |
Single-ended SRAM with cross-point data-aware write operation
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Jou Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Chiu Yi-Wei |
| 國立交通大學 |
2014-12-16T06:14:56Z |
SINGLE-ENDED SRAM WITH CROSS-POINT DATA-AWARE WRITE OPERATION
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Jou Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Chiu Yi-Wei |
| 國立交通大學 |
2014-12-08T15:06:27Z |
Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist
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Tu, Ming-Hsien; Lin, Jihi-Yu; Tsai, Ming-Chien; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-16T06:14:56Z |
SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor
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CHUANG Ching-Te; Jou Shyh-Jye; Hwang Wei; Lin Yi-Wei; Tsai Ming-Chien; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di |
| 國立交通大學 |
2014-12-16T06:13:48Z |
Static memory and memory cell thereof
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Jou Shyh-Jye; Tu Ming-Hsien; Hu Yu-Hao; Chuang Ching-Te; Chiu Yi-Wei |
| 國立交通大學 |
2015-12-04T07:03:10Z |
STATIC MEMORY CELL
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Chuang Ching-Te; Chang Chih-Hao; Chung Chao-Kuei; Lu Chien-Yu; Jou Shyh-Jye; Tu Ming-Hsien |
Showing items 1-25 of 34 (2 Page(s) Totally)
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