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Institution Date Title Author
亞洲大學 2013-10 Design of a low on resistance high voltage (<100V) novel 3D NLDMOS with side STI and single P-top layer based on 0.18um BCD Process Technology Ankit Kumar;Emita Yulia;Emita Yulia Hapsari;Vasanth Kuma;Vasanth Kumar;Aryadeep Mri;Aryadeep Mrinal;許健;Gene Sheu;楊紹明;Shao-Ming Yang;Vivek Ningar

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