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| 國立交通大學 |
2016-03-28T00:05:45Z |
Mitigating Effects of Non-ideal Synaptic Device Characteristics for On-chip Learning
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Chen, Pai-Yu; Lin, Binbin; Wang, I-Ting; Hou, Tuo-Hung; Ye, Jieping; Vrudhula, Sarma; Seo, Jae-sun; Cao, Yu; Yu, Shimeng |
| 國立交通大學 |
2015-12-02T02:59:34Z |
Fully parallel write/read in resistive synaptic array for accelerating on-chip learning
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Gao, Ligang; Wang, I-Ting; Chen, Pai-Yu; Vrudhula, Sarma; Seo, Jae-Sun; Cao, Yu; Hou, Tuo-Hung; Yu, Shimeng |
Showing items 1-2 of 2 (1 Page(s) Totally)
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