臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	Repositories
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	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

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	臺大學術典藏NTU Scholars

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Institution	Date	Title	Author
元智大學	Oct-14	A hybrid method for segmented test data compression	Lung-Jen Lee; Wang-Dauh Tseng; Yi-Yu Liu
元智大學	Mar-15	A hybrid method for segmented test data compression	Lung-Jen Lee; Wang-Dauh Tseng; Yi-Yu Liu
元智大學	Jun-19	Multi-Scan Architecture with Scan Chain Disabling Technique for Capture Power Reduction	JEN-CHENG YING; Wang-Dauh Tseng; WEN-JIIN TSAI
元智大學	Jul-19	Multi-Scan Architecture with Scan Chain Disabling Technique for Capture Power Reduction	JEN-CHENG YING; Wang-Dauh Tseng; WEN-JIIN TSAI
元智大學	Jan-18	Asymmetry dual-LFSR reseeding for low power BIST	Jen-Cheng Yin; Wang-Dauh Tseng; Wen-Jiin Tsai
元智大學	Apr-21	A Cascaded Multicasting Architecture for Test Data Compression	Wang-Dauh Tseng
元智大學	Apr-21	A Cascaded Multicasting Architecture for Test Data Compression	Wang-Dauh Tseng
元智大學	2022-08-02	Enhancing ILP-based Identification of Rational-Weight Threshold Logic Gates	Ting-Yu Yeh; Yueh Cho; Yung-Chih Chen; Wang-Dauh Tseng
元智大學	2022-08-02	Enhancing ILP-based Identification of Rational-Weight Threshold Logic Gates	Ting-Yu Yeh; Yueh Cho; Yung-Chih Chen; Wang-Dauh Tseng
元智大學	2022-08-02	Enhancing ILP-based Identification of Rational-Weight Threshold Logic Gates	Ting-Yu Yeh; Yueh Cho; Yung-Chih Chen; Wang-Dauh Tseng
元智大學	2021-08-03	Test Data Compression Based on Diamond-Shaped Patterns	Fu-Ting Wang; Yu-Chen Hzu; Yung-Chih Chen; Wang-Dauh Tseng
元智大學	2021-08-03	Test Data Compression Based on Diamond-Shaped Patterns	Fu-Ting Wang; Yu-Chen Hzu; Yung-Chih Chen; Wang-Dauh Tseng
元智大學	2020/8/4	Test Power Reduction by Partially Specified Dual-LFSR Reseeding	陳勇志; Yi-An Chen; Wang-Dauh Tseng
元智大學	2018-12-10	Bipolar Dual-LFSR Reseeding for Low-Power Testing	Jen-Cheng Ying; Wang-Dauh Tseng; Wen-Jiin Tsai
元智大學	2016-08-02	Multiple LFSRs reseeding for low power deterministic BIST	Jen-Cheng Yin; Wang-Dauh Tseng; Wen-Jiin Tsai
元智大學	2016-05-20	Compensation Dual-LFSR Reseeding for Low Power BIST	Jen-Cheng Yin; Wang-Dauh Tseng; Wen-Jiin Tsai
國立交通大學	2014-12-12T02:20:28Z	多晶片模組之可測試設計及測試策略	曾王道; Wang-Dauh Tseng; 王國禎
元智大學	2013-05-24	Featured Pattern Run Length Coding for Test Data Compression	Lung-Jen Lee; Chih-Ho Shen; Wang-Dauh Tseng
元智大學	2012-12-10	Two-Way Multicasting for Test Data Compression	Lung-Jen Lee; Wang-Dauh Tseng; Wei-Shun Chen
元智大學	2012-12-10	Dual-LFSR Reseeding for Low Power Testing	Lung-Jen Lee; Wang-Dauh Tseng; Wen-Ting Yang
元智大學	2012-12-10	Deterministic ATPG for Low Capture Power Testing	Lung-Jen Lee; Chia-Cheng He; Wang-Dauh Tseng
元智大學	2012-09	Reduction of Test Data Volume and Test Application Time by Scan Chain Disabling Technique	Lung-Jen Lee; Wang-Dauh Tseng; Lin R.-B.
元智大學	2012-05-25	Improved Run-Length Codes for Test Data Compression	Lung-Jen Lee; Wang-Dauh Tseng; Ting-Fang Liu
元智大學	2012-04	2(n) Pattern Run-Length for Test Data Compression	Lung-Jen Lee; Wang-Dauh Tseng; Lin R.-B.; Cheng-Ho Chang
元智大學	2011-12-02	Scan Chain Partitioning for Low Capture Power Testing	Lung-Jen Lee; Zheng-Yi Xie; Wang-Dauh Tseng

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