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| 國立交通大學 |
2019-04-02T06:04:41Z |
A background comparator calibration technique for flash analog-to-digital converters
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Huang, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:48:44Z |
A 2-V 2-GHz BJT variable frequency oscillator
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Chen, WZ; Wu, JT |
| 國立交通大學 |
2014-12-08T15:46:32Z |
A 2-V, 1.8-GHz BJT phase-locked loop
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Chen, WZ; Wu, JT |
| 國立交通大學 |
2014-12-08T15:40:16Z |
A highly linear 125-MHz CMOS switched-resistor programmable-gain amplifier
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Hsu, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:40:13Z |
A CMOS 33-mW 100-MHz 80-dB SFDR sample-and-hold amplifier
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Hsu, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:27:37Z |
1.2V CMOS switched-capacitor circuits
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Wu, JT; Chang, YH; Chang, KL |
| 國立交通大學 |
2014-12-08T15:27:30Z |
A 2V 100MHz CMOS vector modulator
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Wu, JT; Chang, HD; Chen, PF |
| 國立交通大學 |
2014-12-08T15:27:28Z |
A 2V 2GHz BJT variable-frequency oscillator
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Chen, WZ; Wu, JT |
| 國立交通大學 |
2014-12-08T15:27:25Z |
Low supply voltage CMOS charge pumps
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Wu, JT; Chang, KL |
| 國立交通大學 |
2014-12-08T15:26:38Z |
A 125 MHz 86 dB IM3 programmable-gain amplifier
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Hsu, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:26:36Z |
A 33-mW 12-bit 100-MHz sample-and-hold amplifier
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Hsu, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:26:15Z |
Digital background calibration technique for pipelined analog-to-digital converters
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Liu, HC; Lee, ZM; Wu, JT |
| 國立交通大學 |
2014-12-08T15:26:08Z |
A 125MHz 8b digital-to-phase converter
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Chou, JM; Hsieh, YT; Wu, JT |
| 國立交通大學 |
2014-12-08T15:25:57Z |
Multi-level memory systems using error control codes
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Chang, HC; Lin, CC; Hsiao, TY; Wu, JT; Wang, TH |
| 國立交通大學 |
2014-12-08T15:25:56Z |
A statistical background calibration technique for flash analog-to-digital converters
|
Huang, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:25:47Z |
A 15b 20MS/s CMOS pipelined ADC with digital background calibration
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Liu, HC; Lee, ZM; Wu, JT |
| 國立交通大學 |
2014-12-08T15:25:23Z |
A robust background calibration technique for switched-capacitor pipelined ADCs
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Fan, JL; Wu, JT |
| 國立交通大學 |
2014-12-08T15:19:12Z |
A 15-b 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration
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Liu, HC; Lee, ZM; Wu, JT |
| 國立交通大學 |
2014-12-08T15:18:29Z |
A background comparator calibration technique for flash analog-to-digital converters
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Huang, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:18:11Z |
A 15-bit 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration (vol 40, pg 1047, 2005)
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Liu, HC; Lee, ZM; Wu, JT |
| 國立交通大學 |
2014-12-08T15:16:53Z |
A background timing-skew calibration technique for time-interleaved analog-to-digital converters
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Wang, CY; Wu, JT |
| 國立交通大學 |
2014-12-08T15:16:38Z |
Phase averaging and interpolation using resistor strings or resistor rings for multi-phase clock generation
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Chou, JM; Hsieh, YT; Wu, JT |
| 國立交通大學 |
2014-12-08T15:04:43Z |
A 2-CHIP 1.5-GBD SERIAL LINK INTERFACE
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WALKER, RC; STOUT, CL; WU, JT; LAI, B; YEN, CS; HORNAK, T; PETRUNO, PT |
| 國家衛生研究院 |
2013-09 |
Estimating age-specific cumulative incidence for the 2009 influenza pandemic: A meta-analysis of A(H1N1)pdm09 serological studies from 19 countries
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Van Kerkhove, MD;Hirve, S;Koukounari, A;Mounts, AW;Allwinn, R;Bandaranayake;Bella;Bone, A;Carrat, F;Chadha, MS;Chen, M;Chi, CY;Cox;Cretikos, M;Crowcroft, N;Cutter, J;Donnelly, CA;de Lamballerie, X;Dellagi;Doukas, G;Dudareva-Vizule, S;Ferguson, NM;Fry, AM;Gilbert, GL;Haas, W;Hardelid, P;Horby, P;Huang, QS;Hungnes, O;Ikonen, N;Iwatsuki-Horimoto, K;Julkunen, I;Katz, J;Kawaoka, Y;Lalvani, A;Levy-Bruhl, D;Maltezou, HC;McVernon, J;Miller, M;Mishra, AC;Moghadami, M;Pawar, SD;Reed, C;Riley, S;Rizzo, C;Rosella, L;Ross, TM;Shu, Y;Skowronski, DM;Sridhar, S;Steens, A;Tandale, BV;Theodoridou, M;van Boven, M;Waalen, K;Wang, JR;Wu, JT;Xu, C;Zimmer, S |
| 國立臺灣大學 |
2010-08 |
Biochemical characterization of the small ubiquitin-like modifiers of Chlamydomonas reinhardtii
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Shin, YC; Liu, BY; Tsai, JY; Wu, JT; Chang, LK; Chang, SC. |
Showing items 1-25 of 33 (2 Page(s) Totally)
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