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Taiwan Academic Institutional Repository >
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"wu jt"
Showing items 11-20 of 33 (4 Page(s) Totally) << < 1 2 3 4 > >> View [10|25|50] records per page
| 國立交通大學 |
2014-12-08T15:26:36Z |
A 33-mW 12-bit 100-MHz sample-and-hold amplifier
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Hsu, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:26:15Z |
Digital background calibration technique for pipelined analog-to-digital converters
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Liu, HC; Lee, ZM; Wu, JT |
| 國立交通大學 |
2014-12-08T15:26:08Z |
A 125MHz 8b digital-to-phase converter
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Chou, JM; Hsieh, YT; Wu, JT |
| 國立交通大學 |
2014-12-08T15:25:57Z |
Multi-level memory systems using error control codes
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Chang, HC; Lin, CC; Hsiao, TY; Wu, JT; Wang, TH |
| 國立交通大學 |
2014-12-08T15:25:56Z |
A statistical background calibration technique for flash analog-to-digital converters
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Huang, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:25:47Z |
A 15b 20MS/s CMOS pipelined ADC with digital background calibration
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Liu, HC; Lee, ZM; Wu, JT |
| 國立交通大學 |
2014-12-08T15:25:23Z |
A robust background calibration technique for switched-capacitor pipelined ADCs
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Fan, JL; Wu, JT |
| 國立交通大學 |
2014-12-08T15:19:12Z |
A 15-b 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration
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Liu, HC; Lee, ZM; Wu, JT |
| 國立交通大學 |
2014-12-08T15:18:29Z |
A background comparator calibration technique for flash analog-to-digital converters
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Huang, CC; Wu, JT |
| 國立交通大學 |
2014-12-08T15:18:11Z |
A 15-bit 40-MS/s CMOS pipelined analog-to-digital converter with digital background calibration (vol 40, pg 1047, 2005)
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Liu, HC; Lee, ZM; Wu, JT |
Showing items 11-20 of 33 (4 Page(s) Totally) << < 1 2 3 4 > >> View [10|25|50] records per page
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