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| 臺大學術典藏 |
2020-04-16T02:35:03Z |
Design of low latency on-chip communication based on hybrid NoC architecture
|
Tan, H.-J.; Lee, H.-C.; FEI-PEI LAI; Xiao, D.-S.; Pan, C.-Y.; Lai, F.; Tsai, K.-L.; Tsai, K.-L.;Lai, F.;Pan, C.-Y.;Xiao, D.-S.;Tan, H.-J.;Lee, H.-C. |
| 臺大學術典藏 |
2020-04-16T02:35:03Z |
Design of low latency on-chip communication based on hybrid NoC architecture
|
Tan, H.-J.; Lee, H.-C.; FEI-PEI LAI; Xiao, D.-S.; Pan, C.-Y.; Lai, F.; Tsai, K.-L.; Tsai, K.-L.;Lai, F.;Pan, C.-Y.;Xiao, D.-S.;Tan, H.-J.;Lee, H.-C. |
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