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"yan jin tai"
Showing items 61-70 of 96 (10 Page(s) Totally)
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| 中華大學 |
2007 |
Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2007 |
Timing-Constrained Yield-Driven Wiring Reconstruction for Critical Area Minimization
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2007 |
Routability-Driven Track Routing for Coupling Capacitance Reduction
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Simultaneous Wiring and Buffer Block Planning with Optimal Wire-Sizing for Interconnect-Driven Floorplanning
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Dynamic Tree Reconstruction with Application to Timing-Constrained Congestion-Driven Global Routing
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Timing-Driven Octilinear Steiner Tree Construction Based on Steiner-Point Reassignment
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Yield-Driven Redundant Via Insertion Based on Probabilistic Via-Connection Analysis
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Optimal Network Analysis in Hierarchical Power Quad-Grids
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Width and Timing-Constrained Wire Sizing for Critical Area Minimization
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Multilevel Timing-Constrained Full-Chip Routing in Hierarchical Quad-Grid Model
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顏金泰; YAN, JIN-TAI |
Showing items 61-70 of 96 (10 Page(s) Totally)
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