臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T09:46:18Z	Exploring synergistic DVFS control of cores and DRAMs for thermal efficiency in CMPs with 3D-stacked DRAMs	Lin, P.-S.;Chen, Y.-J.;Yang, C.-L.;Lu, Y.-C.; Lin, P.-S.; Chen, Y.-J.; Yang, C.-L.; Lu, Y.-C.; YI-CHANG LU; CHIA-LIN YANG
臺大學術典藏	2018-09-10T09:24:09Z	Pilot comparative study of unilateral and bilateral robot-assisted training on upper-extremity performance in patients with stroke	Yang, C.-L. and Lin, K.-C. and Chen, H.-C. and Wu, C.-Y. and Chen, C.-L.; Yang, C.-L.; Lin, K.-C.; Chen, H.-C.; Wu, C.-Y.; Chen, C.-L.; Yang, C.-L.; KEH-CHUNG LIN; Lin, K.-C.; Chen, H.-C.; Wu, C.-Y.; Chen, C.-L.
臺大學術典藏	2018-09-10T09:24:08Z	Effect of therapist-based versus robot-assisted bilateral arm training on motor control, functional performance, and quality of life after chronic stroke: A clinical trial	Wu, C.-y.; Yang, C.-l.; Chuang, L.-l.; Lin, K.-c.; Chen, H.-c.; Chen, M.-d.; Huang, W.-c.; Wu, C. and Yang, C. and Chuang, L. and Lin, K. and Chen, H. and Chen, M. and Huang, W.; Wu, C.-y.; KEH-CHUNG LIN; Wu, C.-y.; Yang, C.-l.; Chuang, L.-l.; Chuang, L.-l.; Lin, K.-c.; Lin, K.-c.; Chen, H.-c.; Chen, M.-d.; Chen, M.-d.; Huang, W.-c.; Huang, W.-c.
臺大學術典藏	2018-09-10T09:22:24Z	Guest editorial: Special issue for the 23^rd VLSI design/CAD symposium (VLSI design/CAD 2012)	Lee, T.-C.; Chien, S.-Y.; Yang, C.-L.; SHAO-YI CHIEN
臺大學術典藏	2018-09-10T09:22:09Z	Learning-based time-sensitive re-ranking for web search	Chang, P.-T.; Huang, Y.-C.; Yang, C.-L.; Lin, S.-D.; Cheng, P.-J.; SHOU-DE LIN; PU-JEN CHENG
臺大學術典藏	2018-09-10T09:20:18Z	Age-based PCM wear leveling with nearly zero search cost	Chen, C.-H.; Hsiu, P.-C.; Kuo, T.-W.; Yang, C.-L.; Wang, C.-Y.M.; TEI-WEI KUO; CHIA-LIN YANG
臺大學術典藏	2018-09-10T09:20:18Z	A cycle-level SIMT-GPU simulation framework	Wang, P.-H.; Lo, C.-W.; Yang, C.-L.; Cheng, Y.-J.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T09:20:17Z	SECRET: Selective error correction for refresh energy reduction in DRAMs	Lin, C.-H.; Shen, D.-Y.; Chen, Y.-J.; Yang, C.-L.; Wang, M.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T09:20:17Z	Memory access aware power gating for MPSoCs	Lin, Y.-J.;Yang, C.-L.;Huang, J.-W.;Chang, N.; Lin, Y.-J.; Yang, C.-L.; Huang, J.-W.; Chang, N.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T09:20:17Z	Guest editorial: Special issue for the 23rd VLSI design/CAD symposium (VLSI design/CAD 2012)	Lee, T.-C.; Chien, S.-Y.; Yang, C.-L.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:42:17Z	IMASS: An intelligent Microblog analysis and summarization system	Weng, J.-Y.;Yang, C.-L.;Chen, B.-N.;Wang, Y.-K.;Lin, S.-D.; Weng, J.-Y.; Yang, C.-L.; Chen, B.-N.; Wang, Y.-K.; Lin, S.-D.; SHOU-DE LIN
臺大學術典藏	2018-09-10T08:39:31Z	Power gating strategies on GPUs	Wang, P.-H.;Yang, C.-L.;Chen, Y.-M.;Cheng, Y.-J.; Wang, P.-H.; Yang, C.-L.; Chen, Y.-M.; Cheng, Y.-J.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:39:31Z	A SAT-based routing algorithm for cross-referencing biochips	Yuh, P.-H.;Lin, C.C.-Y.;Huang, T.-W.;Ho, T.-Y.;Yang, C.-L.;Chang, Y.-W.; Yuh, P.-H.; Lin, C.C.-Y.; Huang, T.-W.; Ho, T.-Y.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:39:30Z	Thermal modeling and analysis for 3-D ICs with integrated microchannel cooling	Mizunuma, H.; Lu, Y.-C.; Yang, C.-L.; YI-CHANG LU; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:39:30Z	TACLC: Timing-aware cache leakage control for hard real-time systems	Chen, Y.-J.;Yang, C.-L.;Chi, J.-W.;Chen, J.-J.; Chen, Y.-J.; Yang, C.-L.; Chi, J.-W.; Chen, J.-J.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:38:49Z	Shock attenuation of intervertebral disc following fatigue loading	Chiang, C.-K.;Yang, C.-L.;Chen, W.-C.;Chang, C.-H.;Huang, S.-C.;Wang, J.-L.Chiang, C.-K.;Yang, C.-L.;Chen, W.-C.;Chang, C.-H.;Huang, S.-C.;Wang, J.-L.Chiang, C.-K.;Yang, C.-L.;Chen, W.-C.;Chang, C.-H.;Huang, S.-C.;Wang, J.-L.; Chiang, C.-K.; JAW-LIN WANG; CHIH-HAO CHANG; Yang, C.-L.; Chen, W.-C.; Chang, C.-H.; Huang, S.-C.; Wang, J.-L.
臺大學術典藏	2018-09-10T08:12:23Z	An analytical model to exploit memory task scheduling	Cheng, H.-Y.;Li, J.;Yang, C.-L.; Cheng, H.-Y.; Li, J.; Yang, C.-L.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:12:22Z	PM-COSYN: PE and memory co-synthesis for MPSoCs	Chen, Y.-J.;Yang, C.-L.;Wang, P.-H.; Chen, Y.-J.; Yang, C.-L.; Wang, P.-H.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:12:22Z	Parallelization and characterization of GARCH option pricing on GPUs	Liu, R.-S.;Tsai, Y.-C.;Yang, C.-L.; Liu, R.-S.; Tsai, Y.-C.; Yang, C.-L.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:12:22Z	Memory latency reduction via thread throttling	CHIA-LIN YANG; Yang, C.-L.; Li, J.; Lin, C.-H.; Cheng, H.-Y.;Lin, C.-H.;Li, J.;Yang, C.-L.; Cheng, H.-Y.
臺大學術典藏	2018-09-10T08:12:22Z	Hierarchical memory scheduling for multimedia MPSoCs	Lin, Y.-J.; Yang, C.-L.; Lin, T.-J.; Huang, J.-W.; Chang, N.; Lin, Y.-J.; Yang, C.-L.; Lin, T.-J.; Huang, J.-W.; Chang, N.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:12:22Z	Dynamic thermal management for networked embedded systems under harsh ambient temperature variation	Park, S.;Chen, J.-J.;Shin, D.;Kim, Y.;Yang, C.-L.;Chang, N.; Park, S.; Chen, J.-J.; Shin, D.; Kim, Y.; Yang, C.-L.; Chang, N.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T08:12:22Z	Cache-aware task scheduling on multi-core architecture	Yang, T.-F.;Lin, C.-H.;Yang, C.-L.; Yang, T.-F.; Lin, C.-H.; Yang, C.-L.; CHIA-LIN YANG
臺大學術典藏	2018-09-10T07:36:57Z	A progressive-ILP-based routing algorithm for the synthesis of cross-referencing biochips	Yuh, P.-H.;Sapatnekar, S.S.;Yang, C.-L.;Chang, Y.-W.; Yuh, P.-H.; Sapatnekar, S.S.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG; CHIA-LIN YANG
臺大學術典藏	2018-09-10T07:36:54Z	T-trees: A tree-based representation for temporal and three-dimensional floorplanning	Yuh, P.-H.;Yang, C.-L.;Chang, Y.-W.; Yuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG; CHIA-LIN YANG

Showing items 91-115 of 262 (11 Page(s) Totally)
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