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"yang chia lin"的相關文件
顯示項目 171-180 / 190 (共19頁)
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| 國立臺灣大學 |
2004 |
Temporal Floorplanning Using 3D-subTCG
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Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Chen, Hsin-Lung |
| 國立臺灣大學 |
2004 |
Temporal Floorplanning using T-tree Formulation
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Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen |
| 國立臺灣大學 |
2004 |
Value-Conscious Cache: Simple Technique for Reducing Cache Access Power
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Chang, Yen-Jen; Yang, Chia-Lin; Lai, Feipei |
| 國立臺灣大學 |
2004 |
An Interrupt-Emulation Mechanism with Power-Saving for Flash-Memory Storage Systems
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Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Energy-efficient flash-memory storage systems with an interrupt-emulation mechanism
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Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin; Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Profit-Driven Uniprocessor Scheduling with Energy and Timing Constraints
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Yang, Chia-Lin; Kuo, Tei-Wei; Chen, Jian-Jia; Chen, Jian-Jia; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Temporal Floorplanning Using 3D-subTCG
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Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Chen, Hsin-Lung; Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Chen, Hsin-Lung |
| 臺大學術典藏 |
2004 |
An Interrupt-Emulation Mechanism with Power-Saving for Flash-Memory Storage Systems
|
Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin; Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Zero-Aware Asymmetric SRAM Cell for Reducing Cache Power in Writing Zero
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Chang, Yen-Jen; Lai, Feipei; Yang, Chia-Lin; Chang, Yen-Jen; Lai, Feipei; Yang, Chia-Lin |
| 臺大學術典藏 |
2004 |
Energy-Efficient Flash Memory Storage Systems with an Interrupt Emulation Mechanism
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Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin; Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin |
顯示項目 171-180 / 190 (共19頁)
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