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"yang chia lin"的相關文件
顯示項目 71-80 / 190 (共19頁)
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| 臺大學術典藏 |
2018-09-10T07:03:50Z |
A progressive-ILP based routing algorithm for cross-referencing biochips
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Yuh, Ping-Hung; Sapatnekar, S.; Yang, Chia-Lin; Chang, Yao-Wen; YAO-WEN CHANG; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T07:03:49Z |
BioRoute: A network-flow-based routing algorithm for the synthesis of digital microfluidic biochips
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Yuh, Ping-Hung;Yang, Chia-Lin;Chang, Yao-Wen; Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; YAO-WEN CHANG; Yang, Chia-Lin |
| 臺大學術典藏 |
2018-09-10T07:00:36Z |
Energy-aware flash memory management in virtual memory system
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Li, Han-Lin;Yang, Chia-Lin;Tseng, Hung-Wei; Li, Han-Lin; Yang, Chia-Lin; Tseng, Hung-Wei; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T07:00:36Z |
Exploiting instruction level parallelism in geometry processing for three dimensional graphics applications
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Yang, Chia-Lin; Sano, Barton; Lebeck, Alvin R.; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T07:00:35Z |
Tunablevp: a tunable virtual platform for easy soc design space exploration
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Lin, Ye-Jyun; Chen, Yi-Jung; Huang, Chin-Chie; Lin, Tzu-Ching; Chi, Jaw-Wei; Yang, Chia-Lin; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T06:31:00Z |
Placement of defect-tolerant digital microfluidic biochips using the T-tree formulation
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Yuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG; Yang, Chia-Lin |
| 臺大學術典藏 |
2018-09-10T06:30:59Z |
Temporal floorplanning using the three-dimensional transitive closure subGraph
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Yuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG; Yang, Chia-Lin |
| 臺大學術典藏 |
2018-09-10T06:27:37Z |
An architectural co-synthesis algorithm for energy-aware network-on-chip design
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Hung, Wei-Hsuan;Chen, Yi-Jung;Yang, Chia-Lin;Chang, Yen-Sheng;Su, Alan P.; Hung, Wei-Hsuan; Chen, Yi-Jung; Yang, Chia-Lin; Chang, Yen-Sheng; Su, Alan P.; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T05:20:41Z |
Reconfigurable platform for content science research
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Shih, C.-S.; Yang, C.-L.; Ku, M.-K.; Kuo, T.-W.; Chien, S.-Y.; Chang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN; Shih, Chi-Sheng; Yang, Chia-Lin; TEI-WEI KUO; YAO-WEN CHANG; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T05:18:22Z |
Software-controlled cache architecture for energy efficiency
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Yang, Chia-Lin;Tseng, Hung-Wei;Ho, Chia-Chiang;Wu, Ja-Ling; Yang, Chia-Lin; Tseng, Hung-Wei; Ho, Chia-Chiang; Wu, Ja-Ling; JA-LING WU; Yang, Chia-Lin |
顯示項目 71-80 / 190 (共19頁)
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