| 國立交通大學 |
2014-12-12T02:03:07Z |
字元串列式二階數位濾波器之設計
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楊偉斌; YANG, WEI-BIN; 任建葳; 沈文仁; REN, JIAN-WEI; SHEN, WEN-REN |
| 淡江大學 |
2014-04-26 |
Analysis and Design Considerations of Static CMOS Logics under Process, Voltage and Temperature Variation in 90nm Process
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Yang, Wei-Bin; Lin, Yu-Yao; Lo, Yu-Lung |
| 淡江大學 |
2014-04-26 |
A Low Phase Noise All-Digital Programmable DLL-Based Clock Generator
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Lo, Yu-Lung; Liu, Han-Ying; Chou, Pei-Yuan; Yang, Wei-Bin |
| 淡江大學 |
2013-06 |
A 1.8-V 4-ppm oC Reference Current with Process and Temperature
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Yang, Wei-Bin; Hong, Ming-Hao; Yeh, Sheng-Shuh |
| 淡江大學 |
2013-05 |
A multiple frequency clock generator using wide operation frequency range phase interpolator
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Yang, Wei-Bin; Wang, Chi-Hsiung; Yeh, Sheng-Shih; Liao, Chao-Cheng |
| 淡江大學 |
2013-04-08 |
A GHz Full-Division-Range Programmable Divider with Output Duty-Cycle Improved
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Yu-Lung Lo; Jhih-Wei Tsai; Han-Ying Liu; Yang, Wei-Bin |
| 淡江大學 |
2013-03 |
A new phase interpolator circuit for frequency multiplication design in embedded system
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Yang, Wei-Bin; Wang, Chi-Hsiung; Xie, Shao-Jyun |
| 淡江大學 |
2013-01 |
Low-Power Fast-Settling Low-Dropout Regulator Using a Digitally Assisted Voltage Accelerator for DVFS Application
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Yang, Wei-Bin; Wang, Chi Hsiung; Chang, Hsiang Hsiung; Hong, Ming Hao; Shen, Jsung Mo |
| 淡江大學 |
2012-11-04 |
A 300mV 10MHz 4kb 10T Subthreshold SRAM for Ultralow-Power Application
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Yang, Wei-Bin |
| 淡江大學 |
2012-07-15 |
A 0.3V 1kb Sub-Threshold SRAM for Ultra-Low-Power Application in 90nm CMOS
|
Yang, Wei-Bin |
| 淡江大學 |
2012 |
A Robust Oscillator for Embedded System without External Crystal
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Yang, Wei-Bin; Wang, Chi-Hsiung; Chou, I-Ting |
| 淡江大學 |
2011-12-14 |
Temperature Insensitive Current Reference for the 6.27 MHz Oscillator
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Yang, Wei-bin; Huang, Zheng-yi; Cheng, Ching-tsan; Lo, Yu-lung |
| 淡江大學 |
2011-12-13 |
Supply Voltage and Temperature Insensitive Current Reference for the 4 MHz Oscillator
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Wang, Chi-hsiung; Lin, Cheng-feng; Yang, Wei-bin; Lo, Yu-lung |
| 淡江大學 |
2011-12 |
A New Temperature Independent Current Controlled Oscillator
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Huang, Zheng-yi; Chiang, Jen-shiun; Yang, Wei-bin; Wang, Chi-hsiung |
| 淡江大學 |
2011-10 |
A synthesizable pseudo fractional-N clock generator with improved duty cycle output
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Yang, Wei-Bin; Hsieh, Chang-Yo |
| 淡江大學 |
2011-06-20 |
The High-Performance and Low-Power CMOS Output Driver Design
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Yang, Wei-bin; Liao, Pei-hsuan; Wang, Chi-hsiung; Cheng, Ching-tsan |
| 淡江大學 |
2011-01 |
A 0.5 V 320 MHz 8 bit×8 bit pipelined multiplier in 130 nm CMOS process
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Yang, Wei-Bin; Liao, Chao-Cheng; Liang, Yung-Chih |
| 淡江大學 |
2011 |
The High-Performance and Low-Power CMOS Output Driver Design
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Cheng, Ching-tsan; Wang, Chi-hsiung; Liao, Pei-hsuan; Yang, Wei-bin; Lo, Yu-lung |
| 淡江大學 |
2010-11-21 |
A New Dynamic Fast-Settling Low Dropout Regulator with Programmable Output Voltage
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Yang, Wei-bin; Shen, Jsung-mo; Chang, Hsiang-hsiung; Lo, Yu-lung |
| 淡江大學 |
2010-09 |
High Efficiency Concurrent Embedded Block Coding Architecture for JPEG 2000
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Lin, Tsung-Da; Yang, Wei-Bin; Hsieh, Chang-Yu |
| 淡江大學 |
2010-03 |
A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output
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Yang, Wei-Bin; Lo, Yu-Lung; Chao, Ting-Sheng |
| 淡江大學 |
2009-12 |
A Low Power Multi-Voltage Control Technique with Fast-Settling Mechanism for Low Dropout Regulator
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Shen, Jsung-mo; Yang, Wei-bin; Hsieh, Chang-yu; Lo, Yu-lung |
| 淡江大學 |
2009-12 |
A Pseudo Fractional-N and Multiplier Clock Generator with 50% Duty Cycle Output Using Low Power Phase Combination Controller
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Gao, Wan-lun; Yang, Wei-bin; Lo, Yu-lung |
| 國立高雄師範大學 |
2009-12 |
A Pseudo Fractional-N and Multiplier Clock Generator with 50% Duty Cycle Output Using Low Power Phase Combination Controller
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Wan-Lun Gao;Yang Wei-Bin;Yu-Lung Lo; 羅有龍 |
| 淡江大學 |
2009-09 |
Designing Ultra-Low Voltage PLL Using a Bulk-Driven Technique
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Chao, Ting-sheng; Lo, Yu-lung; Yang, Wei-bin; Cheng, Kuo-hsing |
