English  |  正體中文  |  简体中文  |  Total items :2831944  
Visitors :  33478957    Online Users :  746
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"yang yu ming"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 1-10 of 17  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page

Institution Date Title Author
國立交通大學 2017-04-21T06:50:13Z iTimerC: Common Path Pessimism Removal Using Effective Reduction Methods Yang, Yu-Ming; Chang, Yu-Wei; Jiang, Iris Hui-Ru
國立交通大學 2017-04-21T06:49:13Z Criticality-Dependency-Aware Timing Characterization and Analysis Yang, Yu-Ming; Tam, King Ho; Jiang, Iris Hui-Ru
國立交通大學 2017-04-21T06:48:38Z Analog Placement and Global Routing Considering Wiring Symmetry Yang, Yu-Ming; Jiang, Iris Hui-Ru
國立交通大學 2016-03-28T00:05:45Z iTimerC 2.0: Fast Incremental Timing and CPPR Analysis Lee, Pei-Yu; Jiang, Iris Hui-Ru; Li, Cheng-Ruei; Chiu, Wei-Lun; Yang, Yu-Ming
國立交通大學 2015-11-26T00:55:31Z 針對奈米積體電路之時序分析與最佳化 楊喻名; Yang, Yu-Ming; 江蕙如; Jiang, Iris Hui-Ru
國立交通大學 2014-12-16T06:15:20Z METHOD FOR ANALOG PLACEMENT AND GLOBAL ROUTING CONSIDERING WIRING SYMMETRY JIANG Iris Hui-Ru; YANG Yu-Ming
國立交通大學 2014-12-16T06:14:45Z ENGINEERING CHANGE ORDER HOLD TIME FIXING METHOD JIANG Hiu-Ru; YANG Yu-Ming; HO Sung-Ting
國立交通大學 2014-12-16T06:14:09Z Method for analog placement and global routing considering wiring symmetry Jiang Iris Hui-Ru; Yang Yu-Ming
國立交通大學 2014-12-16T06:13:48Z Engineering change order hold time fixing method Jiang Hiu-Ru; Yang Yu-Ming; Ho Sung-Ting
國立交通大學 2014-12-08T15:36:24Z PushPull: Short-Path Padding for Timing Error Resilient Circuits Yang, Yu-Ming; Jiang, Iris Hui-Ru; Ho, Sung-Ting

Showing items 1-10 of 17  (2 Page(s) Totally)
1 2 > >>
View [10|25|50] records per page