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Showing items 1-10 of 17 (2 Page(s) Totally)
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| 國立交通大學 |
2017-04-21T06:50:13Z |
iTimerC: Common Path Pessimism Removal Using Effective Reduction Methods
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Yang, Yu-Ming; Chang, Yu-Wei; Jiang, Iris Hui-Ru |
| 國立交通大學 |
2017-04-21T06:49:13Z |
Criticality-Dependency-Aware Timing Characterization and Analysis
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Yang, Yu-Ming; Tam, King Ho; Jiang, Iris Hui-Ru |
| 國立交通大學 |
2017-04-21T06:48:38Z |
Analog Placement and Global Routing Considering Wiring Symmetry
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Yang, Yu-Ming; Jiang, Iris Hui-Ru |
| 國立交通大學 |
2016-03-28T00:05:45Z |
iTimerC 2.0: Fast Incremental Timing and CPPR Analysis
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Lee, Pei-Yu; Jiang, Iris Hui-Ru; Li, Cheng-Ruei; Chiu, Wei-Lun; Yang, Yu-Ming |
| 國立交通大學 |
2015-11-26T00:55:31Z |
針對奈米積體電路之時序分析與最佳化
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楊喻名; Yang, Yu-Ming; 江蕙如; Jiang, Iris Hui-Ru |
| 國立交通大學 |
2014-12-16T06:15:20Z |
METHOD FOR ANALOG PLACEMENT AND GLOBAL ROUTING CONSIDERING WIRING SYMMETRY
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JIANG Iris Hui-Ru; YANG Yu-Ming |
| 國立交通大學 |
2014-12-16T06:14:45Z |
ENGINEERING CHANGE ORDER HOLD TIME FIXING METHOD
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JIANG Hiu-Ru; YANG Yu-Ming; HO Sung-Ting |
| 國立交通大學 |
2014-12-16T06:14:09Z |
Method for analog placement and global routing considering wiring symmetry
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Jiang Iris Hui-Ru; Yang Yu-Ming |
| 國立交通大學 |
2014-12-16T06:13:48Z |
Engineering change order hold time fixing method
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Jiang Hiu-Ru; Yang Yu-Ming; Ho Sung-Ting |
| 國立交通大學 |
2014-12-08T15:36:24Z |
PushPull: Short-Path Padding for Timing Error Resilient Circuits
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Yang, Yu-Ming; Jiang, Iris Hui-Ru; Ho, Sung-Ting |
Showing items 1-10 of 17 (2 Page(s) Totally)
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