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Showing items 26-33 of 33 (2 Page(s) Totally)
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| 國立成功大學 |
2017 |
High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications
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Lee, Y.-J.;Hong, T.-C.;Hsueh, F.-K.;Sung, P.-J.;Chen, Chen C.-Y.;Chuang, S.-S.;Cho, T.-C.;Noda, S.;Tsou, Y.-C.;Kao, Kao K.-H.;Wu, C.-T.;Yu, T.-Y.;Jian, Y.-L.;Su, C.-J.;Huang, Y.-M.;Huang, W.-H.;Chen, B.-Y.;Chen, M.-C.;Huang, K.-P.;Li, J.-Y.;Chen, M.-J.;Li, Y.;Samukawa, Samukawa S.;Wu, Wu W.-F.;Huang, G.-W.;Shieh, J.-M.;Tseng, Tseng T.-Y.;Chao, T.-S.;Wang, Y.-H.;Yeh, W.-K. |
| 國立成功大學 |
2017 |
Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION
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Su, C.-J.;Tang, Y.-T.;Tsou, Y.-C.;Sung, P.-J.;Hou, F.-J.;Wang, C.-J.;Chung, S.-T.;Hsieh, C.-Y.;Yeh, Yeh Y.-S.;Hsueh, F.-K.;Kao, Kao K.-H.;Chuang, S.-S.;Wu, C.-T.;You, T.-Y.;Jian, Y.-L.;Chou, T.-H.;Shen, Y.-L.;Chen, B.-Y.;Luo, G.-L.;Hong, T.-C.;Huang, K.-P.;Chen, M.-C.;Lee, Y.-J.;Chao, T.-S.;Tseng, Tseng T.-Y.;Wu, Wu W.-F.;Huang, G.-W.;Shieh, J.-M.;Yeh, W.-K.;Wang, Y.-H. |
| 國立成功大學 |
2017 |
Atomic-Monolayer Two-Dimensional Lateral Quasi-Heterojunction Bipolar Transistors with Resonant Tunneling Phenomenon
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Lin, C.-Y.;Zhu, X.;Tsai, S.-H.;Tsai, S.-P.;Lei, S.;Shi, Y.;Li, Li L.-J.;Huang, S.-J.;Wu, Wu W.-F.;Yeh, W.-K.;Su, Y.-K.;Wang, K.L.;Lan, Y.-W. |
| 國立臺灣科技大學 |
2013 |
Reliability analysis of pHEMT power amplifier with an on-chip linearizer
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Yuan, J.-S.;Wang, Y.;Steighner, J.;Yen, H.-D.;Jang, S.-L.;Huang, G.-W.;Yeh, W.-K. |
| 國立高雄大學 |
2011-10 |
A Proposed High Manufacturability Strain Technology for High-k/Metal Gate SiGe-SOI CMOSFET
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Yeh, W.K.; Cheng, C.Y.; Yang, Y.L.; Lin, C.T.; Lai, C.M.; Chen, Y.W.; Hsu, C.H.; Yang, C.W.; Chen, P.Y. |
| 國立高雄大學 |
2009-11 |
Impact of Oxide Trap Charge on Performance of Strained Fully Depleted SOI Metal-Gate MOSFET
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Yeh, W.K.; Wang, C.C.; Hsu, C.W.; Fang, Y.K.; Wu, S.M.; Ou, C.C.; Lin, C.L.; Gan, K.J.; Weng, C.J.; Chen, P.Y.; Yuan, J.S.; Liou, J.J. |
| 國立高雄大學 |
2007 |
Efficient Transistor Optimization with Stress Enhanced Notch-gate Technology for sub-90nm CMOSFET
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Yeh, W.K. ; Hsu, C.W. ; Lai, C.M. ; Lin, C.T. ; Fang, Y.K. ; Hsu, C.H. ; Chen, L.W. ; Huang, Y.T. ; Tsai, C.T. |
| 國立高雄大學 |
2005 |
The impact of mobility modulation technology on device performance and reliability for sub-90nm SOI MOSFETs
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Yeh, W.K. ; Lai, C.M. ; Lin, C.T. ; Fang, Y.K. ; Hu, H.H. ; Chen, K.M. ; Huang, G.W. |
Showing items 26-33 of 33 (2 Page(s) Totally)
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