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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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2019臺灣學術機構典藏
研討會
機構典藏系統RC7版本已
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Institution Date Title Author
元智大學 Oct-14 A hybrid method for segmented test data compression Lung-Jen Lee; Wang-Dauh Tseng; Yi-Yu Liu
元智大學 Mar-15 A hybrid method for segmented test data compression Lung-Jen Lee; Wang-Dauh Tseng; Yi-Yu Liu
元智大學 2020/8/4 Improved Tree-Based Logic Encryption for Resisting SAT Attack and Removal Attack 陳勇志; Yi-Chun Tsai; Yi-Yu Liu
元智大學 2016-03-14 A novel cache-utilization based dynamic voltage frequency scaling (DVFS) mechanism for reliability enhancements Yen-Hao Chen; Yi-Lun Tang; Yi-Yu Liu; Allen C. H. Wu; TingTing Hwang
元智大學 2015-03-16 Counter-based victim cache hit rate optimization Li-Yen Chang; Chen-Hua Suo; Yi-Yu Liu
元智大學 2014-01 Hybrid LUT and SOP reconfigurable architecture Po-Yang Hsu; Yung-Chih Chen; Yi-Yu Liu
元智大學 2014-01 Buffer design and assignment algorithm for structured ASIC optimization Po-Yang Hsu; Yi-Yu Liu
元智大學 2014-01 Hybrid LUT and SOP reconfigurable architecture Po-Yang Hsu; Yung-Chih Chen; Yi-Yu Liu
元智大學 2013-10-21 Memory management for dual-addressing memory architecture Ting-Wei Hung; Yen-Hao Chen; Yi-Yu Liu
元智大學 2013-07 Routability optimization for crossbar-switch structured ASIC design Mei-Hsiang Tsai; Po-Yang Hsu; Hung-Yi Li; Yi-Huang Hung; Yi-Yu Liu
元智大學 2013-07 Routability optimization for crossbar-switch structured ASIC design Mei-Hsiang Tsai; Po-Yang Hsu; Hung-Yi Li; Yi-Huang Hung; Yi-Yu Liu
元智大學 2013-03-18 Dual-addressing memory architecture for two-dimensional memory access patterns Yen-Hao Chen; Yi-Yu Liu
元智大學 2012-03-08 GPU-based Line Probing Techniques for Mikami Routing Algorithm Chiu-Yi Chan; Jiun-Li Lin; Lung-Sheng Chien; Tsung-Yi Ho; Yi-Yu Liu
元智大學 2011-08-02 Transition Inversion Coding with Parity Check for Off-Chip Serial Transmission Jian Zeng; Lin R.-B.; Jian-Yang Zhou; Yi-Yu Liu
元智大學 2010-12 Performance-driven dual-rail routing architecture for structured ASIC design style Fu-Wei Chen; Yi-Yu Liu

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