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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
元智大學 2019-07-29 Rethinking Last-level-cache Write-back Strategy for MLC STT-RAM Main Memory with Asymmetric Write Energy Yu-Pei Liang; Tseng-Yi Chen; Yuan-Hao Chang; Shuo-Han Chen; Pei-Yu Chen; Wei-Kuan Shih
元智大學 2019-07-29 Rethinking Last-level-cache Write-back Strategy for MLC STT-RAM Main Memory with Asymmetric Write Energy Yu-Pei Liang; Tseng-Yi Chen; Yuan-Hao Chang; Shuo-Han Chen; Pei-Yu Chen; Wei-Kuan Shih

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