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Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立交通大學 |
2019-04-02T06:01:07Z |
Cost-effective triple-mode reconfigurable pipeline FFT/IFFT/2-D DCT processor
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Lin, Chin-Teng; Yu, Yuan-Chu; Van, Lan-Da |
國立交通大學 |
2014-12-12T02:29:06Z |
高效能之管線式傅立葉轉換處理器之設計與實現
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余遠渠; Yu Yuan-Chu; 林進燈; Lin Chin-Teng |
國立交通大學 |
2014-12-08T15:24:50Z |
A low-power 64-point FFT/IFFT design for IEEE 802.11a WLAN application
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Lin, Chin-Teng; Yu, Yuan-Chu; Van, Lan-Da |
國立交通大學 |
2014-12-08T15:11:08Z |
Cost-effective triple-mode reconfigurable pipeline FFT/IFFT/2-D DCT processor
|
Lin, Chin-Teng; Yu, Yuan-Chu; Van, Lan-Da |
國立交通大學 |
2014-12-08T15:05:45Z |
VLSI architecture for the low-computation cycle and power-efficient recursive DFT/IDFT design
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Van, Lan-Da; Lin, Chin-Teng; Yu, Yuan-Chu |
Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
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