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Institution Date Title Author
國立臺灣科技大學 2017 Chip design of class-C quadrature VCO using the quadruple-push coupling technique Lai, W.-C.;Jang, S.-L.;Lu, K.-W.
國立臺灣科技大學 2016 Chip design of low-power and dual-band voltage control oscillator Lai, W.-C;Jang, S.-L;Chuang, Y.-C.
國立成功大學 2002-11 Chip design of MFCC extraction for speech recognition Wang, Jia-Ching; Wang, Jhing-Fa; Weng, Yu-Sheng
國立臺灣科技大學 2009-11 Chip design of phase-locked loop for ISM band applications Jhin-Fang Huang;Po-Ching Li;Jiun-Yu Wen;Ron-Yi Liu
國立臺灣科技大學 2009 Chip design of phase-locked loop for ISM band applications Huang J.-F.; Li P.-C.; Wen J.-Y.; Liu R.-Y.
國立成功大學 2002-11 Chip design of portable speech memopad suitable for persons with visual disabilities Wang, Jhing-Fa; Wang, Jia-Ching; Chen, Han-Chiang; Chen, Tai-Lung; Chang, Chin-Chan; Shih, Ming-Chi
淡江大學 2008-09 Chip Design of White LED Driver 李揚漢; Lee, Yang-han; Huang, Chao-chung; Chen, Jiann-jong; 詹益光; Jan, Yih G.
國立臺灣科技大學 2014 Chip design of WuRx front-end and if Gm-C bandpass filter with antenna to near infrared charging for biomedical application Huang J.-F., Lai W.-C., Lay W.-T.
國立高雄師範大學 1997-02 Chip design og virtual tributary pointer adjustmenter for ADM150 system Sun-Ting Lin; S. T. Lin; 林尚亭
國立臺灣科技大學 2015 Chip Designed Health Transducer and Wireless Sensor for Intelligent Networking Application Lai, W.C.
國立高雄第一科技大學 2012.08 Chip fractal geometry and loading characteristics of sinusoidal multi-cutters in hack-sawing process Wang, J.-J. Junz;Wu, Sung-Hua;Lee, Rong-Shean; 吳松樺
國立成功大學 2012-08 Chip fractal geometry and loading characteristics of sinusoidal multi-cutters in hack-sawing process Wang, J. -J. Junz; Wu, Sung-Hua; Lee, Rong-Shean
國立成功大學 2016-12 Chip fractal geometry and loading characteristics of sinusoidal multi-cutters in hack-sawing process (vol 59, pg 65, 2012) Wu, Sung-Hua; Wang, J. -J. Junz; Lee, Rong-Shean
淡江大學 1998-12-18 Chip implementation and measurement for prosthetic hand controller 李揚漢; Lee, Yang-han; Jau, Liang-lin; Luh, Jer-junn; Tso, Han-wen
國立臺灣科技大學 2017 Chip implementation of a new hyperchaotic oscillator Wu, Y.-L;Yang, C.-H;Wu, C.-H.
淡江大學 1998-02-11 Chip implementation of high speed low power and low voltage current-divison digital-to-analog converter 李揚漢; Lee, Yang-han; Chou, Cheng-chung
中華大學 2003 Chip Implementation of Image Processing Algorithms for Flat Panel Display Controller F*Con-V.1 宋志雲; Sung, Tze-Yun
中華大學 2003 Chip Implementation of Image Processing Algorithms for Flat Panel Display Controller-F*Con-V.1 宋志雲; Sung, Tze-Yun
中華大學 2003 Chip Implementation of Optimal Image Scaling Algorithm for Flat Panel Display Controller-F*Con-V.1 宋志雲; Sung, Tze-Yun
國立臺灣大學 2011 Chip Implementation with a Combined Wireless Temperature Sensor and Reference Devices Based on the DZTC Principle Chang, Ming-Hui; Huang, Yu-Jie; Huang, Han-Pang; Lu, Shey-Shi
臺大學術典藏 2020-01-13T08:18:21Z Chip implementation with a combined wireless temperature sensor and reference devices based on the DZTC principle Chang, M.-H.; Huang, Y.-J.; Huang, H.-P.; Lu, S.-S.; HAN-PANG HUANG
國立臺灣大學 2010 Chip implementation with combined temperature sensor and reference devices based on DZTC principle Chang, M-H.; Liu, C-P.; Huang, H-P.
臺大學術典藏 2020-01-13T08:18:25Z Chip implementation with combined temperature sensor and reference devices based on DZTC principle Chang, M.-H.; Liu, C.-P.; Huang, H.-P.; HAN-PANG HUANG
亞洲大學 2013.10 CHIP inhibits lipopolysaccharide-induced cardiomyocyte hypertrophy by promoting the proteasomal degradation of NFATc3. 黃志揚;HUANG, CHIH-YANG
國立交通大學 2014-12-08T15:26:06Z Chip interleaving for performance improvement of coded DS-CDMA systems in Rayleigh fading channels Lin, YN; Lin, DW
臺大學術典藏 2020-06-16T06:35:54Z Chip Last Fan-Out Packaging for Millimeter Wave Application Lu, H.-C.;Wang, Y.-H.;Leou, J.-L.;Chan, H.;Chen, S.; Lu, H.-C.; Wang, Y.-H.; Leou, J.-L.; Chan, H.; Chen, S.; HSIN-CHIA LU
國立成功大學 2018-11-26 Chip packaging device and alignment bonding method thereof Hsieh, Po-Tsung;Yang, Chia-Ming;Chen, In-Gann;Tseng, Shih-Wen;Tsai, Ya-Wen;Chuang, Ya-Wen
臺大學術典藏 2021-09-02T00:04:08Z Chip Performance Prediction Using Machine Learning Techniques Su M.-Y;Lin W.-C;Kuo Y.-T;Li C.-M;Fang E.J.-W;Hsueh S.S.-Y.; Su M.-Y; Lin W.-C; Kuo Y.-T; Li C.-M; Fang E.J.-W; Hsueh S.S.-Y.; CHIEN-MO LI
義守大學 2013-08 Chip placement design in capacitive proximity communication Yu-Jung Huang
元智大學 2008-01 Chip placement in a reticle for multiple-project wafer fabrication 林榮彬; Meng-Chiou Wu; Shih-Cheng Tsai
國立臺灣科技大學 2009 Chip size estimation for effective blending ratio of slurries in wire sawing of silicon wafers for solar cells Chen C.-C.A.; Kuo B.-L.; Liang J.-S.
國立成功大學 2014/11/12 Chip-based adaptive skin color detection using trajectory constraints on hue Chen, Pei-Yin
國立臺灣海洋大學 2017-05 Chip-based digital surface plasmon resonance sensing platform for ultrasensitive biomolecular detection Pei-Kuen Wei; Ming-Yang Pan; Kuang-Li Lee; Likarn Wang
國立成功大學 2005-05 Chip-based microfluidic devices coupled with electrospray ionization-mass spectrometry Sung, Wang-Chou; Makamba, Honest; Chen, Shu-Hui
國立交通大學 2014-12-08T15:24:14Z Chip-based protein-protein interaction studied by atomic force microscopy Kao, Feng-Sheng; Ger, Waylon; Pan, Yun-Ru; Yu, Hui-Chen; Hsu, Ray-Quen; Chen, Hueih-Min
國立高雄師範大學 2004 Chip-capacitor loaded dual-band microstrip antenna Chih-Yu Huang;H. F. Tsai;M. H. Lin; 黃智裕
國立臺灣大學 2008-12 Chip-CE/MS using a flat low-sheath-flow interface Li, F. A.; Huang, J. L.; Her, G. R.
中華大學 2010 Chip-implementation of a self-tuning nonlinear function control for DC-DC converters 許駿飛; Hsu, Chun-Fei
元智大學 2010-03 Chip-implementation of a self-tuning nonlinear function control for DC-DC converters 林志民; Chun-Fei Hsu; Shuen-Liang Wang; Ming-Chia Li
國立中山大學 2009-04 Chip-inductor-embedded small-size printed strip monopole for WWAN operation in the mobile phone T.W. Kang;K.L. Wong
國立交通大學 2014-12-08T15:25:56Z Chip-interleaved WCDMA with parallel-interference-cancellation receiver in multipath Rayleigh fading channels Lin, YN; Lin, DW
國立暨南國際大學 2009 Chip-Level Channel Estimation for the Downlink of a WCDMA System in Very High Mobility Environment? 張進福; Chang, JF
國立交通大學 2019-08-02T02:24:17Z Chip-Level Characterization and RTN-Induced Error Mitigation beyond 20nm Floating Gate Flash Memory Lin, T. W.; Ku, S. H.; Cheng, C. H.; Lee, C. W.; Ijen-Huang; Tsai, Wen-Jer; Lu, T. C.; Lu, W. P.; Chen, K. C.; Wang, Tahui; Lu, Chih-Yuan
臺大學術典藏 2018-09-10T04:59:35Z Chip-level model of switching noise coupling on integrated system combining package and printed circuit board S.-T. Chen; C.-W. Tsai; S.-M. Wu; C.-P. Hung; T.-L. Wu; TZONG-LIN WU
國立交通大學 2014-12-12T03:05:59Z Chip-on-Glass(COG)彈性凸塊電性與可靠度之研究 林宗寬; Chung Kuang Lin; 陳智; Chih Chen
臺大學術典藏 2018-09-10T07:02:57Z Chip-package-board co-design - A DDR3 system design example from circuit designers' perspective Lin, Y.-H.; Chou, J.; Lu, Y.-C.; Wu, T.-L.; Chen, H.-S.; YI-CHANG LU; HSIN-SHU CHEN
國立高雄師範大學 2005-06 Chip-package-board codesign of highly linear 3G-CDMA upconverter modules Jian-Ming Wu;F. Y. Han;T. S. Horng;C. C. Tu;R. Chen;C.H. Chu; 吳建銘
國立中山大學 2005-06 Chip-package-board codesign of highly linear 3G-CDMA upconverter modules F.Y. Han;J.M. Wu;T.S. Horng;C.C. Tu;R. Chen;C.H. Chu
國立高雄師範大學 2005-10 Chip-Package-Board Codesign of W-CDMA RFICs Jian-Ming Wu;F. Y. Han;T. S. Horng; 吳建銘
國立中山大學 2005-10 Chip-Package-Board Codesign of W-CDMA RFICs F.Y. Han;J.M. Wu;T.S. Horng

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