國立政治大學 |
2017 |
Logic control for story graphs in 3D game narratives
|
Wu, Hui-Yin;Li, Tsai-Yen;Christie, Marc; 李蔡彥 |
國立臺灣海洋大學 |
2014 |
Logic Control of Enzyme-Like Gold Nanoparticles for Selective Detection of Lead and Mercury Ions
|
Chia-Wen Lien;Yu-Ting Tseng;Chih-Ching Huang;Huan-Tsung Chang |
臺大學術典藏 |
2018-09-10T14:59:40Z |
Logic control of enzyme-like gold nanoparticles for selective detection of lead and mercury ions
|
Lien, C.-W.; Tseng, Y.-T.; Huang, C.-C.; Chang, H.-T.; Lien, C.-W.; Tseng, Y.-T.; Huang, C.-C.; Chang, H.-T.; HUAN-TSUNG CHANG |
元智大學 |
2018-03-19 |
Logic Optimization with Considering Boolean Relations
|
陳勇志; Tung-Yuan Lee; Chia-Cheng Wu; Chia-Chun Lin; Chun-Yao Wang |
元智大學 |
2010-12 |
Logic Performance of 40 nm InAslInxGat_xAs Composite Channel HEMTs
|
Faiz Aizad; Heng-Tung Hsu; Chien-I Kuo; Li-Han Hsu; Chien-Ying Wu; Edward Yi; Guo-Wei Huang; Szu-ping Tsai |
元智大學 |
2010-12 |
Logic Performance of 40 nm InAslInxGat_xAs Composite Channel HEMTs
|
Faiz Aizad; Heng-Tung Hsu; Chien-I Kuo; Li-Han Hsu; Chien-Ying Wu; Edward Yi; Guo-Wei Huang; Szu-ping Tsai |
元智大學 |
2010-12 |
Logic Performance of 40 nm InAslInxGat_xAs Composite Channel HEMTs
|
Faiz Aizad; Heng-Tung Hsu; Chien-I Kuo; Li-Han Hsu; Chien-Ying Wu; Edward Yi; Guo-Wei Huang; Szu-ping Tsai |
臺大學術典藏 |
2018-09-10T03:46:51Z |
Logic Programming with Recurrence Domains
|
JIEH HSIANG; JIEH HSIANG; JIEH HSIANG |
國立臺灣大學 |
1992 |
Logic Programming with Recurrence Domains
|
Chen, H.; 項潔; Chen, H.; Hsiang, Jieh |
臺大學術典藏 |
2020-05-04T07:58:54Z |
Logic Programming with Recurrence Domains.
|
JIEH HSIANG; Hsiang, Jieh; Chen, Hong |
淡江大學 |
1993-12-02 |
Logic programs with conflict resolution
|
洪文斌; Horng, Wen-bing; 楊超植; Yang, Chao-chih |
淡江大學 |
1993-12 |
Logic programs with conflict resolution = 邏輯程式中之矛盾解決
|
Horng, Wen-bing; 洪文斌; Yang, Chao-chih; 楊超植 |
國立交通大學 |
2014-12-08T15:03:45Z |
LOGIC SYNTHESIS FOR FIELD-PROGRAMMABLE GATE ARRAYS
|
HWANG, TT; OWENS, RM; IRWIN, MJ; WANG, KH |
國立臺灣大學 |
2009 |
Logic Synthesis in a Nutshell
|
Jiang, Jie-Hong R.; Devadas, Srinivas |
臺大學術典藏 |
2018-09-10T07:43:11Z |
Logic Synthesis in a Nutshell
|
Jie-Hong R. Jiang;Srinivas Devadas; Jie-Hong R. Jiang; Srinivas Devadas; JIE-HONG JIANG |
臺大學術典藏 |
2020-06-11T06:11:12Z |
Logic Synthesis in a Nutshell
|
Jiang, J.H.;Devadas, S.; Jiang, J.H.; Devadas, S.; JIE-HONG JIANG |
臺大學術典藏 |
2019-10-24T07:45:23Z |
Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;C.-C. Chi; C.-C. Chi; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
臺大學術典藏 |
1994-01 |
Logic-Based Parsing of Chinese
|
陳信希; 陳信希 |
國立臺灣大學 |
1994-01 |
Logic-Based Parsing of Chinese
|
陳信希 |
國立臺灣大學 |
1991-06 |
Logic-based Temporal Inferences in Natural Languages
|
Lee, Hsiu-Hui; Lin, I-Peng; Wu, Chien-Ping |
國立交通大學 |
2017-04-21T06:49:12Z |
Logic/Memory Hybrid 3D Sequentially Integrated Circuit Using Low Thermal Budget Laser Process
|
Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Wu, Tsung-Ta; Wang, Hsing-Hsiang; Shen, Chang-Hong; Kao, Ming-Hsuan; Yeh, Wen-Kuan; Chang, Meng-Fan; Wu, Meng-Chyi; Shieh, Jia-Min |
中原大學 |
1998-02 |
Logical and computational problems of arithmetical Sentences
|
Shih-Ping Tung |
臺大學術典藏 |
2021-02-23T06:09:54Z |
Logical Consequence
|
楊金穆; 楊金穆; CHIN-MU YANG |
國立交通大學 |
2014-12-08T15:02:59Z |
Logical Effort Model Extension with Temperature and Voltage Variations
|
Wu, Chun-Hui; Lin, Shun-Hua; Chiueh, Herming |
國立交通大學 |
2014-12-08T15:21:45Z |
Logical Effort Models with Voltage and Temperature Extensions in Super-/Near-/Sub-threshold Regions
|
Chang, Ming-Hung; Hsieh, Chung-Ying; Chen, Mei-Wei; Hwang, Wei |