English  |  正體中文  |  简体中文  |  2823024  
???header.visitor??? :  30223722    ???header.onlineuser??? :  791
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

???jsp.browse.items-by-title.jump??? [ ???jsp.browse.general.jump2chinese??? ] [ ???jsp.browse.general.jump2numbers??? ] [ A B C D E F G H I J K L M N O P Q R S T U V W X Y Z ]
???jsp.browse.items-by-title.enter???   

Showing items 310101-310125 of 2310128  (92406 Page(s) Totally)
<< < 12400 12401 12402 12403 12404 12405 12406 12407 12408 12409 > >>
View [10|25|50] records per page

Institution Date Title Author
元智大學 2020/12/3 Design of 24 hours lighting system to Aid Sleep Patterns for Persons Living with Dementia Aien Charity Grace White; Gulsatar Ali; Nafia Al-Mutawaly; Bao Le; Jonathon David White
國立交通大學 2014-12-08T15:08:59Z Design of 24-GHz 0.8-V 1.51-mW Coupling Current-Mode Injection-Locked Frequency Divider With Wide Locking Range Huang, Zue-Der; Wu, Chung-Yu; Huang, Bi-Chou
國立臺灣大學 2008 Design of 2D Modular Robot Based on Magnetic Force Analysis Shiu, M.-C.; Lee H.-T.; Lian F.-L.; Fu L.-C.
臺大學術典藏 2018-09-10T07:03:38Z Design of 2D modular robot based on magnetic force analysis Shiu, M.-C.; Lee H.-T.; Lian F.-L.; Fu L.-C.; FENG-LI LIAN; LI-CHEN FU
國立成功大學 2021 Design of 2D Systolic Array Accelerator for Quantized Convolutional Neural Networks Liu, C.-N.;Lai, Y.-A.;Kuo, C.-H.;Zhan, S.-A.
國立交通大學 2015-07-21T08:31:00Z DESIGN OF 2xV(DD) LOGIC GATES WITH ONLY 1xV(DD) DEVICES IN NANOSCALE CMOS TECHNOLOGY Chiu, Po-Yen; Ker, Ming-Dou
國立交通大學 2014-12-08T15:24:40Z Design of 2xVDD-Tolerant I/O Buffer with 1xVDD CMOS Devices Ker, Ming-Dou; Lin, Yan-Liang
義守大學 2009 Design of 2xVDD-tolerant I/O buffer with 1xVDD CMOS devices Ker, Ming-Dou ; Lin, Yan-Liang
國立交通大學 2014-12-08T15:13:13Z Design of 2xVDD-tolerant I/O buffer with considerations of gate-oxide reliability and hot-carrier degradation Tsai, Hui-Wen; Ker, Ming-Dou
國立交通大學 2014-12-08T15:07:59Z Design of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradation Tsai, Hui-Wen; Ker, Ming-Dou
義守大學 2010-01 Design of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradation Hui-Wen Tsai;Ming-Dou Ker
國立交通大學 2014-12-08T15:06:44Z Design of 2xVDD-Tolerant Power-Rail ESD Clamp Circuit With Consideration of Gate Leakage Current in 65-nm CMOS Technology Wang, Chang-Tzu; Ker, Ming-Dou
義守大學 2010-06 Design of 2xVDD-Tolerant Power-Rail ESD Clamp Circuit With Consideration of Gate Leakage Current in 65-nm CMOS Technology Chang-Tzu Wang;Ming-Dou Ker
臺大學術典藏 2020-06-11T06:24:11Z Design of 3-D FIR cone-shaped filters by a nest of McClellan transformations Shyu, J.-J.;Pei, S.-C.;Huang, Y.-D.; Shyu, J.-J.; Pei, S.-C.; Huang, Y.-D.; SOO-CHANG PEI
臺大學術典藏 2020-06-11T06:24:12Z Design of 3-D FIR cone-shaped filters by McClellan transformation and least-squares contour mapping Shyu, J.-J.;Pei, S.-C.;Huang, Y.-D.; Shyu, J.-J.; Pei, S.-C.; Huang, Y.-D.; SOO-CHANG PEI
臺大學術典藏 2019-12-19T08:38:31Z Design of 3-D Magnetic Field Sensor with Single Bridge of Spin-Valve Giant Magnetoresistance Films Luong, V.-S.;Jeng, J.-T.;Lai, B.-L.;Hsu, J.-H.;Chang, C.-R.;Lu, C.-C.; Luong, V.-S.; Jeng, J.-T.; Lai, B.-L.; Hsu, J.-H.; Chang, C.-R.; Lu, C.-C.; CHING-RAY CHANG
中國文化大學 2021-11 Design of 3-dB parallel-line coupler using the substrate integrated double-strip coaxial line with performance enhancement Ho, Min-Hua; Lee, Keh-Yi; Hong, Wanchu; Su, Gwan-Wei
元智大學 2012-05-05 Design of 3.5GHz Low Supply Receiver Front-Ends for WIMAX Application Chia-Chien Li; Yi-Chen Chen; Jeng-Rern Yang
元智大學 2012-05-05 Design of 3.5GHz Low Supply Receiver Front-Ends for WIMAX Application Chia-Chien Li; Yi-Chen Chen; Jeng-Rern Yang
元智大學 2012-05-05 Design of 3.5GHz Low Supply Receiver Front-Ends for WIMAX Application Chia-Chien Li; Yi-Chen Chen; Jeng-Rern Yang
臺大學術典藏 2018-09-10T06:34:49Z Design of 30GHz transition between microstrip line and substrate integrated waveguide C. K. Yau; T. Y. Huang; T. M. Shen; H. Y. Chien; R. B. Wu; RUEY-BEEI WU
國立東華大學 2004 Design of 35 GHz PHEMT MMIC power amplifier Lin,Y. S.; Chang,J. M.; Chiou,Y. Z.; Yang,K. M.
國立臺灣科技大學 2016 Design of 38-GHz branch-line coupler in glass-substrate integrated passive device technology Chang, Chang C.-L;Tseng, C.-H.
國立臺灣科技大學 2018 Design of 3D printed porous additive manufactured cages using a computer model of T10-S1 multilevel spine Chang T.-K.; Hsu C.-C.; Zhou S.-Y.; Tsai P.-I.; Wang F.-Y.
淡江大學 1996-12 Design of 3D real time databases 黃俊堯; Huang, J. Y.; Lin, J. L.

Showing items 310101-310125 of 2310128  (92406 Page(s) Totally)
<< < 12400 12401 12402 12403 12404 12405 12406 12407 12408 12409 > >>
View [10|25|50] records per page