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Showing items 391226-391250 of 2303212 (92129 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:26:45Z |
ESD implantations in 0.18-mu m salicided CMOS technology for on-chip ESD protection with layout consideration
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Ker, MD; Chuang, CH |
| 國立交通大學 |
2020-10-05T02:02:01Z |
ESD Improvements on Power N-Channel LDMOS Devices by the Composite Structure of Super Junctions Integrated With SCRs in the Drain Side
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Chen, Hung-Wei; Chen, Shen-Li; Huang, Yu-Ting; Chen, Hsun-Hsiang |
| 國立交通大學 |
2014-12-16T06:14:33Z |
ESD protection circuit
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Ker; Ming-Dou; Lin; Kun-Hsien |
| 國立交通大學 |
2014-12-16T06:14:37Z |
ESD protection circuit
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Ker; Ming-Dou; Lin; Kun-Hsien |
| 國立交通大學 |
2014-12-08T15:38:52Z |
ESD Protection Circuit for High-Voltage CMOS ICs with Improved Immunity Against Transient-Induced Latchup
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Ker, Ming-Dou; Hsu, Che-Lun; Chen, Wen-Yi |
| 國立交通大學 |
2014-12-16T06:14:05Z |
ESD protection circuitry with multi-finger SCRS
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Ker Ming-Dou; Lin Chun-Yu; Wang Chang-Tzu |
| 國立交通大學 |
2014-12-16T06:15:37Z |
ESD PROTECTION CIRCUITRY WITH MULTI-FINGER SCRS
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Ker, Ming-Dou; Lin, Chun-Yu; Wang, Chang-Tzu |
| 國立交通大學 |
2014-12-08T15:26:38Z |
ESD protection circuits with novel MOS-bounded diode structures
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Ker, MD; Chuang, CH |
| 國立交通大學 |
2014-12-08T15:18:29Z |
ESD protection design for 1-to 10-GHz distributed amplifier in CMOS technology
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Ker, MD; Hsiao, YW; Kuo, BJ |
| 國立交通大學 |
2014-12-08T15:22:52Z |
ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process
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Lin, Chun-Yu; Chu, Li-Wei; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:26:31Z |
ESD protection design for 900-MHz RF receiver with 8-kV HBM ESD robustness
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Ker, MD; Lo, WY; Lee, CM; Chen, CP; Kao, HS |
| 國立交通大學 |
2014-12-08T15:26:31Z |
ESD protection design for 900-MHz RF receiver with 8-kV HBM ESD robustness
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Ker, MD; Lo, WY; Lee, CM; Chen, CP; Kao, HS |
| 國立臺灣師範大學 |
2019-09-03T10:46:07Z |
ESD Protection Design for Broadband Circuits
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賴玉瑄; Lai, Yu-Hsuan |
| 國立交通大學 |
2014-12-08T15:25:47Z |
ESD protection design for broadband RF circuits with decreasing-size distributed protection scheme
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Ker, MD; Kuo, BJ |
| 國立交通大學 |
2014-12-08T15:25:00Z |
ESD protection design for CMOS integrated circuits with mixed-voltage I/O interfaces
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Chang, Wei-Jen; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:42:19Z |
ESD protection design for CMOS RF integrated circuits using polysilicon diodes
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Ker, MD; Chang, CY |
| 國立交通大學 |
2014-12-08T15:46:07Z |
ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR
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Ker, Ming-Dou; Lin, Chun-Yu; Meng, Guo-Xuan |
| 國立交通大學 |
2014-12-08T15:10:12Z |
ESD protection design for giga-Hz high-speed I/O interfaces in a 130-nm CMOS process
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Hsiao, Yuan-Wen; Ker, Ming-Dou; Chiu, Po-Yen; Huang, Chun; Tseng, Yuh-Kuang |
| 國立交通大學 |
2017-04-21T06:49:29Z |
ESD Protection Design for Gigahertz Differential LNA in a 65-nm CMOS Process
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Lin, Chun-Yu; Fan, Mei-Lian; Fu, Wei-Hao |
| 國立交通大學 |
2018-08-21T05:56:49Z |
ESD Protection Design for High-Speed Applications in CMOS Technology
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Chen, Jie-Ting; Lin, Chun-Yu; Chang, Rong-Kun; Ker, Ming-Dou; Tzeng, Tzu-Chien; Lin, Tzu-Chiang |
| 國立交通大學 |
2014-12-08T15:18:07Z |
ESD protection design for I/O cells with embedded SCR structure as power-rail ESD clamp device in nanoscale CMOS technology
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Ker, MD; Lin, KH |
| 國立交通大學 |
2014-12-08T15:36:14Z |
ESD protection design for mixed-voltage I/O buffer with substrate-triggered circuit
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Ker, MD; Hsu, HC |
| 國立交通大學 |
2014-12-08T15:26:34Z |
ESD protection design for mixed-voltage I/O circuit with substrate-triggered technique in sub-quarter-micron CMOS process
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Ker, MD; Chuang, CH; Hsu, KC; Lo, WY |
| 國立交通大學 |
2014-12-08T15:25:20Z |
ESD protection design for mixed-voltage I/O interfaces - Overview
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Ker, Ming-Dou; Lin, Kun-Hsien |
| 國立交通大學 |
2014-12-08T15:26:14Z |
ESD protection design for mixed-voltage-tolerant I/O buffers with substrate-triggered technique
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Ker, MD; Hsu, HC |
Showing items 391226-391250 of 2303212 (92129 Page(s) Totally)
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