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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
國立交通大學 2014-12-08T15:07:55Z ESD Avoiding Circuits for Solving OTP Memory Falsely Programmed Issues Huang, Shao-Chang; Chen, Ke-Horng; Chen, Hsin-Ming; Ho, Ming-Chou; Shen, Rick Shih-Jye
元智大學 2011-02 ESD Currents Induced in a Charged Human Body Approaching a Vehicle Hsing-Yi Chen; Yu-Ching Chu
國立成功大學 2005-06 ESD engineering of nitride-based LEDs Su, Yan-Kuin; Chang, Shoou-Jinn; Wei, Sun-Chin; Chen, Shi-Ming; Li, W. L.
國立交通大學 2014-12-08T15:17:09Z ESD failure mechanisms of analog I/O cells in 0.18-mu m CMOS technology Ker, MD; Chen, SH; Chuang, CH
國立交通大學 2014-12-08T15:40:18Z ESD implantation for subquarter-micron CMOS technology to enhance ESD robustness Ker, MD; Hsu, HC; Peng, JJ
國立交通大學 2014-12-08T15:19:14Z ESD implantations for on-chip ESD protection with layout consideration in 0.18-mu m salicided CMOS technology Ker, MD; Chuang, CH; Lo, WY
國立交通大學 2014-12-08T15:26:45Z ESD implantations in 0.18-mu m salicided CMOS technology for on-chip ESD protection with layout consideration Ker, MD; Chuang, CH
國立交通大學 2020-10-05T02:02:01Z ESD Improvements on Power N-Channel LDMOS Devices by the Composite Structure of Super Junctions Integrated With SCRs in the Drain Side Chen, Hung-Wei; Chen, Shen-Li; Huang, Yu-Ting; Chen, Hsun-Hsiang
國立交通大學 2014-12-16T06:14:33Z ESD protection circuit Ker; Ming-Dou; Lin; Kun-Hsien
國立交通大學 2014-12-16T06:14:37Z ESD protection circuit Ker; Ming-Dou; Lin; Kun-Hsien
國立交通大學 2014-12-08T15:38:52Z ESD Protection Circuit for High-Voltage CMOS ICs with Improved Immunity Against Transient-Induced Latchup Ker, Ming-Dou; Hsu, Che-Lun; Chen, Wen-Yi
國立交通大學 2014-12-16T06:14:05Z ESD protection circuitry with multi-finger SCRS Ker Ming-Dou; Lin Chun-Yu; Wang Chang-Tzu
國立交通大學 2014-12-16T06:15:37Z ESD PROTECTION CIRCUITRY WITH MULTI-FINGER SCRS Ker, Ming-Dou; Lin, Chun-Yu; Wang, Chang-Tzu
國立交通大學 2014-12-08T15:26:38Z ESD protection circuits with novel MOS-bounded diode structures Ker, MD; Chuang, CH
國立交通大學 2014-12-08T15:18:29Z ESD protection design for 1-to 10-GHz distributed amplifier in CMOS technology Ker, MD; Hsiao, YW; Kuo, BJ
國立交通大學 2014-12-08T15:22:52Z ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process Lin, Chun-Yu; Chu, Li-Wei; Ker, Ming-Dou
國立交通大學 2014-12-08T15:26:31Z ESD protection design for 900-MHz RF receiver with 8-kV HBM ESD robustness Ker, MD; Lo, WY; Lee, CM; Chen, CP; Kao, HS
國立交通大學 2014-12-08T15:26:31Z ESD protection design for 900-MHz RF receiver with 8-kV HBM ESD robustness Ker, MD; Lo, WY; Lee, CM; Chen, CP; Kao, HS
國立臺灣師範大學 2019-09-03T10:46:07Z ESD Protection Design for Broadband Circuits 賴玉瑄; Lai, Yu-Hsuan
國立交通大學 2014-12-08T15:25:47Z ESD protection design for broadband RF circuits with decreasing-size distributed protection scheme Ker, MD; Kuo, BJ
國立交通大學 2014-12-08T15:25:00Z ESD protection design for CMOS integrated circuits with mixed-voltage I/O interfaces Chang, Wei-Jen; Ker, Ming-Dou
國立交通大學 2014-12-08T15:42:19Z ESD protection design for CMOS RF integrated circuits using polysilicon diodes Ker, MD; Chang, CY
國立交通大學 2014-12-08T15:46:07Z ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR Ker, Ming-Dou; Lin, Chun-Yu; Meng, Guo-Xuan
國立交通大學 2014-12-08T15:10:12Z ESD protection design for giga-Hz high-speed I/O interfaces in a 130-nm CMOS process Hsiao, Yuan-Wen; Ker, Ming-Dou; Chiu, Po-Yen; Huang, Chun; Tseng, Yuh-Kuang
國立交通大學 2017-04-21T06:49:29Z ESD Protection Design for Gigahertz Differential LNA in a 65-nm CMOS Process Lin, Chun-Yu; Fan, Mei-Lian; Fu, Wei-Hao

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