| 臺大學術典藏 |
2020-06-11T06:34:48Z |
A 0.3V 10bit 7.3fJ/conversion-step SAR ADC in 0.18μm CMOS
|
Hsieh, C.-E.;Liu, S.-I.; Hsieh, C.-E.; Liu, S.-I.; SHEN-IUAN LIU |
| 淡江大學 |
2012-07-15 |
A 0.3V 1kb Sub-Threshold SRAM for Ultra-Low-Power Application in 90nm CMOS
|
Yang, Wei-Bin |
| 元智大學 |
2020/7/28 |
A 0.3V, 625Mbps LVDS Driver in 0.18um CMOS Technology
|
Hungwen Lin; Tzu-Hao Lin |
| 臺大學術典藏 |
2018-09-10T08:15:03Z |
A 0.4-6 GHz variable-gain driver amplifier for software-defined radio
|
Lin, K.-T.; Chen, H.-K.; Wang, T.; Lu, S.-S.; SHEY-SHI LU |
| 國立成功大學 |
2022 |
A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual- Aliasing Reduction
|
Qiu, Y.-Z.;Chien, S.-H.;Kuo, T.-H. |
| 國立成功大學 |
2022-02 |
A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual-Aliasing Reduction
|
Qiu;Yi-Zhi;Chien;Shih-Hsiung;Kuo;Tai-Haur |
| 國立成功大學 |
2020 |
A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing Reduction
|
Chien, S.-H.;Kuo, T.-H.;Huang, Huang H.-Y.;Wang, H.-B.;Qiu, Y.-Z. |
| 國立交通大學 |
2017-04-21T06:48:47Z |
A 0.42V Vccmin ASIC-Compatible Pulse-Latch Solution as a Replacement for a Traditional Master-Slave Flip-Flop in a Digital SOC
|
Dhong, Sang; Guo, Richard; Kuo, Ming-Zhang; Yang, Ping-Lin; Lin, Cheng-Chung; Huang, Kevin; Wang, Min-Jer; Hwang, Wei |
| 臺大學術典藏 |
2020-06-11T06:34:47Z |
A 0.43pJ/bit true random number generator
|
Kuan, T.-K.;Chiang, Y.-H.;Liu, S.-I.; Kuan, T.-K.; Chiang, Y.-H.; Liu, S.-I.; SHEN-IUAN LIU |
| 國立交通大學 |
2016-03-28T00:05:45Z |
A 0.48V 0.57nJ/Pixel Video-Recording SoC in 65nm CMOS
|
Lin, Tay-Jyi; Chien, Cheng-An; Chang, Pei-Yao; Chen, Ching-Wen; Wang, Po-Hao; Shyu, Ting-Yu; Chou, Chien-Yung; Luo, Shien-Chun; Guo, Jiun-In; Chen, Tien-Fu; Chuang, Gene C. H.; Chu, Yuan-Hua; Cheng, Liang-Chia; Su, Hong-Men; Jou, Chewnpu; Ieong, Meikei; Wu, Cheng-Wen; Wang, Jinn-Shyan |
| 國立交通大學 |
2018-08-21T05:56:39Z |
A 0.4V 53dB SNDR 250 MS/s Time-Based CT Delta Sigma Analog to Digital Converter
|
Chen, Hung-Kai; Chen, Wei-Zen; Ren Zhiyuan |
| 南台科技大學 |
2007-11 |
A 0.5 mm Carbon Nanotube Field Emission Source
|
Max Chung; Chih Chia Chang; Bohr Ran Huang |
| 國立成功大學 |
2002-09 |
A 0.5 mu m concurrent testable chip of a fifth-order g(m)-C filter
|
Lee, Kuen-Jong; Wang, Wei-Chiang |
| 淡江大學 |
2011-01 |
A 0.5 V 320 MHz 8 bit×8 bit pipelined multiplier in 130 nm CMOS process
|
Yang, Wei-Bin; Liao, Chao-Cheng; Liang, Yung-Chih |
| 國立交通大學 |
2014-12-08T15:40:05Z |
A 0.5 V 4.85 Mbps Dual-Mode Baseband Transceiver With Extended Frequency Calibration for Biotelemetry Applications
|
Chen, Tsan-Wen; Yu, Jui-Yuan; Yu, Chien-Ying; Lee, Chen-Yi |
| 國立高雄師範大學 |
2009-08 |
A 0.5 V Phase-Locked Loop in 90nm CMOS Process
|
Kuo-Hsing Cheng;Jing-Shiuan Huang;Yu-Chang Tsai;Chao-Chang Chiu;Yu-Lung Lo; 羅有龍 |
| 臺大學術典藏 |
2003-06 |
A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier
|
Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei; Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei |
| 國立臺灣大學 |
2003-06 |
A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier
|
Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei |
| 元智大學 |
2016-06-23 |
A 0.5-3.5GHZ Wideband CMOS LNA for LTE Application
|
Wei-Rern Liao; Jeng-Rern Yang |
| 國立高雄師範大學 |
2011-03 |
A 0.5-V 0.4–2.24-GHz Inductorless Phase-Locked Loop in a System-on-Chip
|
Kuo-Hsing Chen;Yu-Chang Tsai;Yu-Lung Lo;Jing-Shiuan Huang; 羅有龍 |
| 國立交通大學 |
2018-08-21T05:54:15Z |
A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist
|
Wu, Shang-Lin; Li, Kuang-Yu; Huang, Po-Tsang; Hwang, Wei; Tu, Ming-Hsien; Lung, Sheng-Chi; Peng, Wei-Sheng; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te |
| 臺大學術典藏 |
2019-10-24T08:43:09Z |
A 0.5-V 400-MHz Transceiver Using Injection-Locked Techniques in 180-nm CMOS
|
林宗賢;TSUNG-HSIEN LIN;T.-H. Lin;Y.-L. Tsai;T.-W. Wang;C.-R. Lee; C.-R. Lee; T.-W. Wang; Y.-L. Tsai; T.-H. Lin; TSUNG-HSIEN LIN; 林宗賢 |
| 國立臺灣科技大學 |
2011 |
A 0.5-V Biomedical System-on-a-Chip for Intrabody Communication System
|
Lin, Y.T.;Lin, Y.S.;Chen, C.H.;Chen, H.C.;Yang, Y.C.;Lu, S.S. |
| 國立暨南國際大學 |
2011 |
A 0.5-V Biomedical System-on-a-Chip for Intrabody Communication System?
|
林佑昇; Lin, YS |
| 臺大學術典藏 |
2018-09-10T15:19:40Z |
A 0.54-0.55 THz 2×4 coherent source array with EIRP of 24.4 dBm in 65nm CMOS technology
|
Zhao, Y.;Lu, H.-C.;Chen, H.-P.;Chang, Y.-T.;Huang, R.;Chen, H.-N.;Jou, C.;Hsueh, F.-L.;Chang, M.-C.F.; Zhao, Y.; Lu, H.-C.; Chen, H.-P.; Chang, Y.-T.; Huang, R.; Chen, H.-N.; Jou, C.; Hsueh, F.-L.; Chang, M.-C.F.; HSIN-CHIA LU |
