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Showing items 905001-905025 of 2307435 (92298 Page(s) Totally) << < 36196 36197 36198 36199 36200 36201 36202 36203 36204 36205 > >> View [10|25|50] records per page
義守大學 |
2001-11 |
VLSI Design of Inverse-Free Berlekamp-Massey Algorithm for Reed-Solomon Code
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Truong, T.K. ; Chang, Y.W. ; Jeng, J.H. |
元智大學 |
Jan-16 |
VLSI Design of Lossless Frame Recompression Using Multi-Orientation Prediction
|
Yu-Hsuan Lee; Yi-Lun You; Yi-Guo Chen |
國立成功大學 |
2023 |
VLSI Design of Number Theoretic Transform for BGV Fully Homomorphic Encryption
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Chen, K.-Y.;Shieh, M.-D. |
臺大學術典藏 |
2007 |
VLSI DESIGN OF WAVELET TRANSFORM, ANALYSIS, ARCHITECTURE, AND DESIGN EXAMPLES
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Chen, Liang-Gee; Huang, Chao-Tsung; Chen, Ching-Yeh; Cheng, Chih-Chi; Chen, Liang-Gee; Huang, Chao-Tsung; Chen, Ching-Yeh; Cheng, Chih-Chi |
國立臺灣大學 |
2007 |
VLSI DESIGN OF WAVELET TRANSFORM, ANALYSIS, ARCHITECTURE, AND DESIGN EXAMPLES
|
Chen, Liang-Gee; Huang, Chao-Tsung; Chen, Ching-Yeh; Cheng, Chih-Chi |
國立交通大學 |
2014-12-08T15:26:27Z |
VLSI implememtation for MAC-level DWT architecture
|
Huang, SR; Dung, LR |
國立成功大學 |
2019 |
VLSI Implementation for an Adaptive Haze Removal Method
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Kuo;Yao-Tsung;Chen;Wei-Ting;Chen;Pei-Yin;Li;Cheng-Hsien |
國立交通大學 |
2014-12-08T15:36:44Z |
VLSI implementation for Epileptic Seizure Prediction System based on Wavelet and Chaos Theory
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Hung, Shao-Hang; Chao, Chih-Feng; Wang, Shu-Kai; Lin, Bor-Shyh; Lin, Chin-Teng |
中華大學 |
2006 |
VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation
|
宋志雲; Sung, Tze-Yun |
中華大學 |
2006 |
VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation,
|
謝曜式; Shieh, Yaw-Shih |
臺大學術典藏 |
2018-09-10T06:30:42Z |
VLSI implementation of 2-D discrete wavelet transform for real-time video signal processing
|
Yu, C.; Chen, S.-J.; SAO-JIE CHEN |
中華大學 |
2005 |
VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse
|
宋志雲; Sung, Tze-Yun |
中華大學 |
2005 |
VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse
|
謝曜式; Shieh, Yaw-Shih |
中華大學 |
2005 |
VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse
|
林國珍; Lin, Kuo-Jen |
中華大學 |
2006 |
VLSI Implementation of A High-Efficient and Cost-Effective LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
中華大學 |
2006 |
VLSI Implementation of a High-Efficient and Cost-Effective LCD Singal Processor,
|
謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
宋志雲; Sung, Tze-Yun |
中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
謝曜式; Shieh, Yaw-Shih |
國立中山大學 |
1997-06 |
VLSI Implementation of a High-Throughput CORDIC Processor for Both Angle Calculation and Vector Rotation
|
Shen-Fu Hsiao; Jen-Yin Chen |
國立交通大學 |
2014-12-08T15:35:45Z |
VLSI Implementation of a Low Complexity 4x4 MIMO Sphere Decoder with Table Enumeration
|
Yang, Kai-Jiun; Tsai, Shang-Ho; Chang, Ruei-Ching; Chen, Yan-Cheng; Chuang, Gene C. -H. |
中華大學 |
2005 |
VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFF Processor for Wireless LAN
|
林國珍; Lin, Kuo-Jen |
中華大學 |
2005 |
VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN
|
宋志雲; Sung, Tze-Yun |
中華大學 |
2005 |
VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN
|
謝曜式; Shieh, Yaw-Shih |
國立交通大學 |
2014-12-08T15:20:30Z |
VLSI Implementation of a Mixed Bio-signal Lossless Data Compressor for Portable Brain-Heart Monitoring Systems
|
Chua, Ericson; Fu, Chih-Chung; Fang, Wai-Chi |
國立成功大學 |
2006-12 |
VLSI implementation of a modified efficient SPIHT encoder
|
Huang, Win-Bin; Su, Alvin W. Y.; Kuo, Yau-Hwang |
Showing items 905001-905025 of 2307435 (92298 Page(s) Totally) << < 36196 36197 36198 36199 36200 36201 36202 36203 36204 36205 > >> View [10|25|50] records per page
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