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显示项目 66-90 / 107 (共5页)
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机构 日期 题名 作者
亞洲大學 2011-11 Design of Multiple RESURF LDMOS with P-top rings and STI regions in 65nm CMOS Technology 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2011-11 Self-Consistent Electro-Thermo-Mechanical Analysis of AlN Passivation Effect on AlGaN/GaN HEMTs 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-11 Development of ESD Robustness Enhancement of a Novel 800V LDMOS Multiple RESURF with Linear P-top Rings 蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL and Gate Extended Field Plate Technologies 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Application of Multi-Lateral Double Diffused Field Ring in Ultrahigh-Voltage Device MOS Transistor Design 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2011-08 Effects of SiO2 passivation on AlGaN/GaN HEMT by self-consistent electro-thermal-mechanical simulation 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2011-07 An 800 Volts High Voltage Interconnection Level 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2011 A 2-dimensional mesh study using sentaurus simulator 許健;Sheu, Gene
亞洲大學 2011 LDMOS Thermal SOA Investigation of a Novel 800V Multiple RESURF with 許健;Sheu, Gene
亞洲大學 2011 A Novel 800V Multiple RESURF LDMOS Utilizing 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2010.01 Analysis future and obstacle of solar building substance 陳秀宜;Chen, Shiu-Yi;鄭正豐;C.F.Cheng;許健;Sheu, Gene
亞洲大學 2010-11 A 5V/200V SOI Device with a Vertically Linear Graded Drift Region 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2010-11 A 2D Analytical Model of Bulk-silicon Triple RESURF Devices 許健;Sheu, Gene
亞洲大學 2010-11 A Novel 800V Multiple RESURF LDMOS Utilizing Linear P-top Rings 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2010-11 An 800 Volts High Voltage Interconnection Level Shifter Using Floating Poly Field Plate (FPFP) Method 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2010-10 ESD Simulation on GGNMOS for 40V BCD 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2010-07 An Analytical Model of Surface Electric Field Distributionsin in Ultrahigh-Voltage Metal–Oxide–Semiconductor Devices 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2010-07 An Analytical Model of Surface Electric Field Distributions in Ultrahigh-Voltage Buried P-top Lateral Diffused Metal-Oxide-Semiconductor Devices 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;張怡楓;Chang, Yi-Fong;曹世昌;Tsaur, Shyh-Chang
亞洲大學 2010-03 Combining 2D and 3D Device Simulations for Optimizing LDMOS Design 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2010-03 Reduction of Kink Effect in SOI LDMOS Structure with Linear Drift Region Thickness 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2010-03 Comparison of High Voltage (200-300 Volts) Lateral Power MOSFETs for Power Integrated Circuits 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;陳兆南
亞洲大學 2010 A High Performance Silicon-on-Insulator LDMOSTT Using Linearly Increasing Thickness Techniques 郭宇?;GUO, Yu-Feng;王志功;WANG, Zhi-Gong;許健;Sheu, Gene
亞洲大學 2009.08 Dependence of Breakdown Voltage on Drift Length and Linear Doping Gradients in SOI RESURF LDMOS Devices 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2009.07 VARIATION OF LATERAL THICKNESSTECHNIQUES IN SOI LATERAL HIGH VOLTAGE DEVICE 郭宇鋒;Guo, Yufeng;王至剛;Wang1, Zhigong;許健;Sheu, Gene

显示项目 66-90 / 107 (共5页)
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