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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Showing items 46-70 of 107  (5 Page(s) Totally)
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Institution Date Title Author
亞洲大學 2012.09 Characterization of NBTI by Evaluation of Hydrogen Amount in the Si/SiO2 Interface 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2012-09 Characterization of NBTI by Evaluation of Hydrogen Amount in the Si/SiO2 Interface 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2012-09 Failure Analysis of Power MOSFETs based on Multifinger Configuration under Unclamped Inductive 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2012-09 Mechanism and Improvement of Breakdown Degradation Induced by Interface Charge in UHV 許健;Sheu, Gene
亞洲大學 2012-09 Study of energy capability and failure of LDMOSFET at different ambient temperatures 許健;Sheu, Gene;許健;Sheu, Gene
亞洲大學 2012-09 Failure Analysis of Power MOSFETs based on Multi-finger Configuration under Unclamped Inductive Switching (UIS) Stress Condition 楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene
亞洲大學 2012-09 Shifting Time Waveform Induced CMOS Latch Up in Bootstrapping Technique Applications 蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene
亞洲大學 2012-09 Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance on reverse recovery 蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2012-09 Optimization of ESD Protection Device Using SCR 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2012-08 Analysis of LDMOS for Effect of Finger and Device-width on Gate Feedback 楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2012-08 Optimization of ESD Protection Device Using SCR Structure of a Novel STI-sided LDMOS with P-top 許健;Sheu, Gene
亞洲大學 2012-08 Analysis of LDMOS for Effect of Finger and Device-width on Gate Feedback Charge 楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene
亞洲大學 2012-08 Optimization of ESD Protection Device Using SCR Structure of a Novel STI-sided LDMOS with P-top Layer for 5 V Operating Voltage 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
國立高雄師範大學 2012-07-08 研究哈洛?品特主要劇作之抗爭模式 許健
亞洲大學 2012-07 A 2?D Analytical Model of SOI High?voltage Devices with Dual Conduction Layers 許健;Sheu, Gene
亞洲大學 2012-06 Energy Capability of LDMOS as a Function of Ambient Temperature 許健;Sheu, Gene
亞洲大學 2012-03 A New Methodology to Investigate the Effect of Stress and Bias on 2DEG and Drain Current of AlGaN/GaN Based Heterostructure 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2012-03 A New Methodology to Investigate the Effect of Stress and Bias on 2DEG and Drain Current of AlGaN-GaN Based Heterostructure 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2012-03 Optimization of nLDMOS ruggedness under Unclamped Inductive Switching (UIS) stress conditions by poly-gate extension 蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2012-03 Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance (Load) on Reverse Recovery 蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming;許健;Sheu, Gene
亞洲大學 2011-11 Design of Multiple RESURF LDMOS with P-top rings and STI regions in 65nm CMOS Technology 許健;Sheu, Gene;楊紹明;Yang, Shao-Ming;蔡宗叡;Tsai, Jung-Ruey
亞洲大學 2011-11 Self-Consistent Electro-Thermo-Mechanical Analysis of AlN Passivation Effect on AlGaN/GaN HEMTs 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-11 Development of ESD Robustness Enhancement of a Novel 800V LDMOS Multiple RESURF with Linear P-top Rings 蔡宗叡;Tsai, Jung-Ruey;許健;Sheu, Gene;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming
亞洲大學 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL and Gate Extended Field Plate Technologies 許健;Sheu, Gene;蔡宗叡;Tsai, Jung-Ruey;楊紹明;Yang, Shao-Ming

Showing items 46-70 of 107  (5 Page(s) Totally)
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