臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

About TAIR
	About TAIR

Browse By
	Institution
	Author
	Title
	Date
	Statistics Chart
	Institution Facts
	Trend

News
	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

Copyright
	Publisher & Journal Policy
	TAIR Copyright Conference Minutes

Related Links
	機構典藏計畫網站
	ROAR
	OpenDOAR
	SHERPA
	OAIster
	JAIRO
	Ira
	DSPACE
	RWWR
	臺大學術典藏NTU Scholars

"謝曜式"

Return to Browse by Author
Sorting by Title	Sort by Date

Showing items 16-40 of 75 (3 Page(s) Totally)
1 2 3 > >>
View [10|25|50] records per page

Institution	Date	Title	Author
中華大學	2010	A Novel VLSI Linear Array for 2-D DCT/IDCT	謝曜式; Shieh, Yaw-Shih
中華大學	2010	An Efficient VLSI Linear Array for DCT/IDCT Using Subband Decomposition Algorithm	謝曜式; Shieh, Yaw-Shih
中華大學	2010	A Novel Linear Array for Discrete Cosine Transform	謝曜式; Shieh, Yaw-Shih
中華大學	2009	The Fast DCT and IDCT Algorithm by Subband Decomposition of signal	謝曜式; Shieh, Yaw-Shih
中華大學	2009	一種快速正弦與餘弦函數產生器	謝曜式; Shieh, Yaw-Shih
中華大學	2008	A Superior Algorithm for Resizing Images by using the Subband DCT	謝曜式; Shieh, Yaw-Shih
中華大學	2007	A Fast Algorithm for Resizing Images in the DCT Domain	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficient Line-Based Architecture for 2-D Discrete Wavelet Transform Based on Lifting Scheme Using 9/7 Wavelet Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficient Image Scalar Algorithm for LCD Signal Processor	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor	謝曜式; Shieh, Yaw-Shih
中華大學	2006	Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic	謝曜式; Shieh, Yaw-Shih
中華大學	2006	High-Speed and Low-Power Architectures for Forward and Inverse Discrete Wavelet Transform Using 4-Tap Daubechies Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering	謝曜式; Shieh, Yaw-Shih
中華大學	2006	台灣科技產業結構性改變與管理之變遷	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Throughput and Memory-Efficiency 2-D DCT Architecture Based on CORDIC Rotation	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A Parallel and Pipelined Architecture for 2-D CORDIC-Based Inverse Discrete Cosine Transform	謝曜式; Shieh, Yaw-Shih
中華大學	2006	An Efficient Line-Based Architecture for 2-D Lifting-Based DECT Using 9/7 Wavelet Filters	謝曜式; Shieh, Yaw-Shih
中華大學	2006	無線網絡應用於新世代城鄉安全監控系統	謝曜式; Shieh, Yaw-Shih
中華大學	2006	A Low-Power and High-Efficiency Image Scalar Algorithm for LCD Display Controller	謝曜式; Shieh, Yaw-Shih
中華大學	2006	無線網絡應用於智慧型車輛安全監控及物流系統	謝曜式; Shieh, Yaw-Shih

Showing items 16-40 of 75 (3 Page(s) Totally)
1 2 3 > >>
View [10|25|50] records per page

	English \| 正體中文 \| 简体中文 \| Total items :2832279
	Visitors : 33707002 Online Users : 1078 Project Commissioned by the Ministry of Education Project Executed by National Taiwan University Library