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"謝曜式"的相关文件
显示项目 6-30 / 75 (共3页)
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| 中華大學 |
2012 |
Histogram Modification and Wavelet Transform for High Performance Watermarking
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2012 |
Difference-Equation-Based Digital Frequency Synthesizer
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2012 |
Adaptive Binary Arithmetic Coder-Based Image Feature and Segmentation in the Compressed Domain
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2012 |
A Novel Fractional-Discrete-Cosine-Transform-Based Reversible Watermarking for Healthcare Information Management Systems
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2012 |
A Rate-Distortion-Based Merging Algorithm for Compressed Image Segmentation
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2012 |
A Unified Algorithm for Subband-Based Discrete Cosine Transform
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2012 |
Haar-Wavelet-Based Just Noticeable Distortion Model for Transparent Watermark
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2011 |
FPGA Implementation of High Performance DCT/IDCT Processor
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2011 |
Wavelet Based Just Noticeable Distortion Model for Transparent Watermarking
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2010 |
A Novel VLSI Linear Array for Discrete Cosine Transform and Its Inverse
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2010 |
A Novel VLSI Linear Array for 2-D DCT/IDCT
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2010 |
An Efficient VLSI Linear Array for DCT/IDCT Using Subband Decomposition Algorithm
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2010 |
A Novel Linear Array for Discrete Cosine Transform
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2009 |
The Fast DCT and IDCT Algorithm by Subband Decomposition of signal
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2009 |
一種快速正弦與餘弦函數產生器
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2008 |
A Superior Algorithm for Resizing Images by using the Subband DCT
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2007 |
A Fast Algorithm for Resizing Images in the DCT Domain
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Discrete Wavelet Transform Based on Lifting Scheme Using 9/7 Wavelet Filters
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic
|
謝曜式; Shieh, Yaw-Shih |
显示项目 6-30 / 75 (共3页)
1 2 3 > >>
每页显示[10|25|50]项目
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