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"謝曜式"???jsp.browse.items-by-author.description???
Showing items 1-50 of 75 (2 Page(s) Totally) 1 2 > >> View [10|25|50] records per page
國立交通大學 |
2014-12-12T02:12:39Z |
步進控制及其於工具機路徑之應用
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謝曜式; Yaw-Shih Shieh; 李安謙; An-Chen Lee |
中華大學 |
2012 |
A FAST MQ TABLE BASED MERGING ALGORITHM FOR IMAGE SEGMENTATION
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
Nested Quantization Index Modulation for ReversibleWatermarking and Its Application to Healthcare InformationManagement Systems
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
An Adaptive Coding Pass Scanning Algorithm for Optimal Rate Control in Biomedical Images
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
A New Texture Synthesis Algorithm Based on Wavelet Packet Tree
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
Histogram Modification and Wavelet Transform for High Performance Watermarking
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
Difference-Equation-Based Digital Frequency Synthesizer
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
Adaptive Binary Arithmetic Coder-Based Image Feature and Segmentation in the Compressed Domain
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
A Novel Fractional-Discrete-Cosine-Transform-Based Reversible Watermarking for Healthcare Information Management Systems
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
A Rate-Distortion-Based Merging Algorithm for Compressed Image Segmentation
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
A Unified Algorithm for Subband-Based Discrete Cosine Transform
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2012 |
Haar-Wavelet-Based Just Noticeable Distortion Model for Transparent Watermark
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2011 |
FPGA Implementation of High Performance DCT/IDCT Processor
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2011 |
Wavelet Based Just Noticeable Distortion Model for Transparent Watermarking
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2010 |
A Novel VLSI Linear Array for Discrete Cosine Transform and Its Inverse
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2010 |
A Novel VLSI Linear Array for 2-D DCT/IDCT
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2010 |
An Efficient VLSI Linear Array for DCT/IDCT Using Subband Decomposition Algorithm
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2010 |
A Novel Linear Array for Discrete Cosine Transform
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2009 |
The Fast DCT and IDCT Algorithm by Subband Decomposition of signal
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2009 |
一種快速正弦與餘弦函數產生器
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2008 |
A Superior Algorithm for Resizing Images by using the Subband DCT
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2007 |
A Fast Algorithm for Resizing Images in the DCT Domain
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Discrete Wavelet Transform Based on Lifting Scheme Using 9/7 Wavelet Filters
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A High-Efficient Image Scalar Algorithm for LCD Signal Processor
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
High-Speed and Low-Power Architectures for Forward and Inverse Discrete Wavelet Transform Using 4-Tap Daubechies Filters
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
台灣科技產業結構性改變與管理之變遷
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A High-Throughput and Memory-Efficiency 2-D DCT Architecture Based on CORDIC Rotation
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A Parallel and Pipelined Architecture for 2-D CORDIC-Based Inverse Discrete Cosine Transform
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
An Efficient Line-Based Architecture for 2-D Lifting-Based DECT Using 9/7 Wavelet Filters
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
無線網絡應用於新世代城鄉安全監控系統
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A Low-Power and High-Efficiency Image Scalar Algorithm for LCD Display Controller
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
無線網絡應用於智慧型車輛安全監控及物流系統
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
VLSI Architectures for 2-D Forward and Inverse Discrete Wavelet Transform Using 4-tap Daubechies Filters
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
VLSI Implementation of Double- Rotation CORDIC Arithmetic
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation,
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
Cost-Effective Architectures for 2-D Forward and Inverse Discrete Cosine Transform Architecture
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
A High-Efficient and Cost-Effective LCD Signal Processor
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter
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謝曜式; Shieh, Yaw-Shih |
中華大學 |
2006 |
The Closed-Loop Control of the Dual-Output Buck-Boost Converters with Structure of Single-Inductor Boost Converter
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謝曜式; Shieh, Yaw-Shih |
Showing items 1-50 of 75 (2 Page(s) Totally) 1 2 > >> View [10|25|50] records per page
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