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Institution Date Title Author
國立中山大學 1997-12 A low-power and high-speed dynmaic PLA circuit configurationfor single-clock CMOS C.C. Wang;C.F. Wu;R.T. Hwang;C.H. Kao
國立中山大學 1997-12 VLSI implemnetation of a word-slice pipelined maximum selector for priority queues C.C. Wang;G.C. Lin
國立中山大學 1997-09 IDDQ testable configuration for PLAs by transformation into inverters C.F. Wu;C.C. Wang;R.T. Hwang;C.H. Kao
國立中山大學 1997-08 A 1.0 GHz 64-bit parallel comparator using two-phase clocking ANT dynamic logic C.C. Wang;K.C. Tsai
國立中山大學 1997-07 Low power technology mapping by hiding high-transition paths in invisible edges for LUT-based FPGAs C.C. Wang;C.P. Kwan
國立中山大學 1997-03 Digitial Design of Discrete Exponential Bidirectional Associative Memory C.C. Wang;C.L. Fan
中原大學 1997 A Systematic Approach for IC Fab Design J. C. Chen;C. C. Chien;H. H. Tseng;C. C. Wang;T. C. Chang;
國立中山大學 1997 Digitial Design of Discrete Exponential Bidirectional Associative Memory C.C. Wang;C.L. Fan
國立中山大學 1996-12 Practical capacity analysis and radix searching algothims of asymptotically stable exponential bidirectional associative memory C.C. Wang
國立中山大學 1996-11 Low-power greedy state pair grouping algorithm and power reduction estimation for finite state machine C.C. Wang;Y.L. Fan

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