English  |  正體中文  |  简体中文  |  Total items :0  
Visitors :  50704725    Online Users :  313
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"c f wu"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 21-30 of 35  (4 Page(s) Totally)
<< < 1 2 3 4 > >>
View [10|25|50] records per page

Institution Date Title Author
國立中山大學 2000 A low-cost quadrature decoder/counter interface integrated circuit for AC induction motor server control C.C. Wang;P.M. Lee;Y.L. Tseng;C.F. Wu
國立中山大學 1999-09 In-sawing-lane multi-level BIST for known good dies of LCD drivers C.C. Wang;C.F. Wu;S.H. Chen;C.H. Kao
國立中山大學 1999-09 A real chip used in low-cost testing modules for liquid crystal display drivers C.C. Wang;C.F. Wu;S.H. Chen;C.H. Kao
國立中山大學 1999-07 A low-power high-speed dynamic PLA circuit configuration for single-clock CMOS C.C. Wang;C.F. Wu; R.T. Hwang;C.H. Kao
國立中山大學 1999-06 A chip design of radix-4/2 64b/32b signed and usigned integer divider using COMPASS cell library C.C. Wang;C.J. Huang;G.C. Lin;C.F. Wu
國立中山大學 1999-05 Cell-based implementation of a mixed-radix-8/4/2 64b/32b signed integer divider using COMPASS cell library C.C. Wang;I.Y. Chang;C.F. Wu
國立中山大學 1999-01 Dynamic NOR-NOR PLA Design with IDDQ Testability C.F. Wu;C.C. Wang;R.T. Hwang;C.H. Kao
國立中山大學 1999 In-sawing-lane multi-level BIST for known good dies of LCD drivers C.C. Wang;C.F. Wu;S.H. Chen;C.H. Kao
國立中山大學 1999 Dynamic NOR-NOR PLA Design with IDDQ Testability C.F. Wu;C.C. Wang;R.T. Hwang;C.H. Kao
國立中山大學 1999 A low-power high-speed dynamic PLA circuit configuration for single-clock CMOS C.C. Wang;C.F. Wu;R.T. Hwang;C.H. Kao

Showing items 21-30 of 35  (4 Page(s) Totally)
<< < 1 2 3 4 > >>
View [10|25|50] records per page