臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 26-35 of 35 (4 Page(s) Totally)
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Institution	Date	Title	Author
國立中山大學	1999-05	Cell-based implementation of a mixed-radix-8/4/2 64b/32b signed integer divider using COMPASS cell library	C.C. Wang;I.Y. Chang;C.F. Wu
國立中山大學	1999-01	Dynamic NOR-NOR PLA Design with IDDQ Testability	C.F. Wu;C.C. Wang;R.T. Hwang;C.H. Kao
國立中山大學	1999	In-sawing-lane multi-level BIST for known good dies of LCD drivers	C.C. Wang;C.F. Wu;S.H. Chen;C.H. Kao
國立中山大學	1999	Dynamic NOR-NOR PLA Design with IDDQ Testability	C.F. Wu;C.C. Wang;R.T. Hwang;C.H. Kao
國立中山大學	1999	A low-power high-speed dynamic PLA circuit configuration for single-clock CMOS	C.C. Wang;C.F. Wu;R.T. Hwang;C.H. Kao
國立中山大學	1998-11	1 GHz 64-bit High-Speed Comparator Using ANT Dynamic Logic with Two-Phase Clocking	C.C. Wang;C.F. Wu;K.C. Tsai
國立中山大學	1998-06	Design of single-ended SRAM with high test coverage and short test time	C.F. Wu;C.C. Wang;R.T. Hwang;C.H. Kao
國立中山大學	1998-04	Design of fast dynamic CMOS comparators with fewer transistor count	C.F. Wu;C.C. Wang;Y.L. Tseng;C.H. Kao
國立中山大學	1997-12	A low-power and high-speed dynmaic PLA circuit configurationfor single-clock CMOS	C.C. Wang;C.F. Wu;R.T. Hwang;C.H. Kao
國立中山大學	1997-09	IDDQ testable configuration for PLAs by transformation into inverters	C.F. Wu;C.C. Wang;R.T. Hwang;C.H. Kao

Showing items 26-35 of 35 (4 Page(s) Totally)
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