| 元智大學 |
Sep-16 |
Area-aware Decomposition for Single-Electron Transistor Arrays
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陳勇志; Ching-Hsuan Ho; Chun-Yao Wang; Ching-Yi Huang; Suma Datta; Vijaykrishnan Narayanan |
| 元智大學 |
Oct-16 |
Minimization of Number of Neurons in Voronoi Diagram-Based Artificial Neural Networks
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陳勇志; Chen-Yu Lin; Chun-Yao Wang; Ching-Yi Huang; Chiou-Ting Hsu |
| 元智大學 |
Oct-16 |
Minimization of Number of Neurons in Voronoi Diagram-Based Artificial Neural Networks
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陳勇志; Chen-Yu Lin; Chun-Yao Wang; Ching-Yi Huang; Chiou-Ting Hsu |
| 元智大學 |
Jun-16 |
Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays
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陳勇志; Ching-Yi Huang; Yun-Jui Li; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 元智大學 |
Jun-16 |
Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays
|
陳勇志; Ching-Yi Huang; Yun-Jui Li; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 元智大學 |
Dec-15 |
Synthesis for Width Minimization in the Single-Electron Transistor Array
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陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 元智大學 |
Dec-15 |
Synthesis for Width Minimization in the Single-Electron Transistor Array
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陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 元智大學 |
Apr-17 |
Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays
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陳勇志; Yun-Jui Li; Ching-Yi Huang; Chia-Cheng Wu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 元智大學 |
Apr-15 |
Correctness Analysis and Power Optimization for Probabilistic Boolean Circuits
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陳勇志; Ching-Yi Huang; Zheng-Shan Yu; Tung-Chen Tsou; Chun-Yao Wang |
| 國立成功大學 |
2020 |
Long-term effectiveness of pentavalent and monovalent rotavirus vaccines against hospitalization in Taiwan children
|
Huang, Y.-C.;Wu, F.-T.;Huang, Y.-C.;Liu, C.-C.;Chun-Yi-Lee;Lin, H.-C.;Chi, H.;Huang, L.-M.;Ho, Y.-H.;Lee, J.-T.;Shih, Shih S.-M.;Ching-Yi-Huang;Hsiung, C.A.;Alliance, Taiwan Pediatric Infectious Disease |
| 元智大學 |
2018-04-16 |
Using Range-equivalent Circuits for Facilitating Bounded Sequential Equivalence Checking
|
Wei-An Ji; Chih-Chung Wang; Ching-Yi Huang; Chia-Cheng Wu; Chia-Chun Lin; Chun-Yao Wang; 陳勇志 |
| 元智大學 |
2018-04-16 |
Using Range-equivalent Circuits for Facilitating Bounded Sequential Equivalence Checking
|
Wei-An Ji; Chih-Chung Wang; Ching-Yi Huang; Chia-Cheng Wu; Chia-Chun Lin; Chun-Yao Wang; 陳勇志 |
| 元智大學 |
2016-01-25 |
MajorSat: A SAT Solver to Majority Logic
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陳勇志; Yu-Min Cho; Chun-Yao Wang; Ching-Yi Huang |
| 元智大學 |
2015-09-08 |
Synthesis and Verification of Cyclic Combinational Circuits
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陳勇志; Jui-Hung Chen; Wan-Chen Weng; Ching-Yi Huang; Chun-Yao Wang |
| 元智大學 |
2015-03-16 |
Using Range-Equivalent Circuits for Facilitating Bounded Sequential Equivalence Checking
|
陳勇志; Wei-An Ji; Chih-Chung Wang; Ching-Yi Huang; Chun-Yao Wang |
| 元智大學 |
2015-03-16 |
Using Range-Equivalent Circuits for Facilitating Bounded Sequential Equivalence Checking
|
陳勇志; Wei-An Ji; Chih-Chung Wang; Ching-Yi Huang; Chun-Yao Wang |
| 元智大學 |
2015-03-09 |
Using Structural Relations for Checking Combinationality of Cyclic Circuits
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陳勇志; Wan-Chen Weng; Jui-Hung Chen; Ching-Yi Huang; Chun-Yao Wang |
| 元智大學 |
2015-03-09 |
Using Structural Relations for Checking Combinationality of Cyclic Circuits
|
陳勇志; Wan-Chen Weng; Jui-Hung Chen; Ching-Yi Huang; Chun-Yao Wang |
| 元智大學 |
2015-03-09 |
Using Structural Relations for Checking Combinationality of Cyclic Circuits
|
陳勇志; Wan-Chen Weng; Jui-Hung Chen; Ching-Yi Huang; Chun-Yao Wang |
| 元智大學 |
2015-01-19 |
A Defect-aware Approach for Mapping Reconfigurable Single-Electron Transistor Arrays
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陳勇志; Ching-Yi Huang; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 元智大學 |
2015-01-19 |
A Defect-aware Approach for Mapping Reconfigurable Single-Electron Transistor Arrays
|
陳勇志; Ching-Yi Huang; Chian-Wei Liu; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 中原大學 |
2014-07-31 |
外溢效果和槓桿效果分析-以稀土礦產型ETF為實證
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黃靜怡; Ching-Yi Huang |
| 元智大學 |
2014-03-24 |
Rewiring for threshold logic circuit minimization
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陳勇志; Chia-Chun Lin; Chun-Yao Wang; Ching-Yi Huang |
| 元智大學 |
2014-03-24 |
Width Minimization in the Single-Electron Transistor Array Synthesis
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陳勇志; Chian-Wei Liu; Chang-En Chiang; Ching-Yi Huang; Chun-Yao Wang; Suman Datta; Vijaykrishnan Narayanan |
| 元智大學 |
2013-11-18 |
Sensitization Criterion for Threshold Logic Circuits and its Application
|
陳勇志; Chen-Kuan Tsai; Chun-Yao Wang; Ching-Yi Huang |
