| 國立成功大學 |
2022-12-28 |
應用於類神經網路的記憶內運算的加速器
|
邱瀝毅;CHIOU, LIH-YIH;陳韻如;CHEN, YUN-RU;陳宗琪;CHEN, TSUNG-CHI |
| 國立成功大學 |
2021-06-18 |
Memory system capable of performing a bit partitioning process and an internal computation process
|
Chiou, Lih-Yih;Lin, Yu-Wei;Ling, Wei-Shuo; 邱瀝毅 |
| 國立成功大學 |
2018-12 |
Temperature Gradient Exploration Method for Determining the Appropriate Number of Cells in Mesh-Based Thermal Analysis
|
邱瀝毅; CHIOU, LIH-YIH;Lu, Liang-Ying |
| 國立成功大學 |
2018-10 |
Methodology for developing virtual platforms from power-aware to power- and thermal-aware at electronic system level
|
邱瀝毅; CHIOU, LIH-YIH;Lu, Liang-Ying;Hsieh, Tsung-Yu;Weng, Pei-En |
| 國立成功大學 |
2017-11-29 |
Highly Reliable Two-Step Charge-Pump Read Scheme for 1.5 F2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM
|
邱瀝毅; CHIOU, LIH-YIH;Chien, Tsai-Kan;Chang, Chi-Shian;Huang, Jing-Yu;Wu, Chung-Han;Lee, Heng-Yuan;Sheu, Shyh-Shyuan |
| 國立成功大學 |
2017-08 |
Temperature gradient-aware thermal simulator for three-dimensional integrated circuits
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邱瀝毅; CHIOU, LIH-YIH;Lu, Liang-Ying |
| 國立成功大學 |
2016-09-14 |
Single port SRAM memory cell driven by two word lines in asynchronous manner and memory employing the same
|
Chiou, Lih-Yih;Huang, Chi-Ray |
| 國立成功大學 |
2016-06 |
Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications
|
Chien, Tsai-Kan; Chiou, Lih-Yih; Sheu, Shyh-Shyuan; Lin, Jing-Cian; Lee, Chang-Chia; Ku, Tzu-Kun; Tsai, Ming-Jinn; Wu, Chih-I |
| 國立成功大學 |
2016-06 |
Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications
|
邱瀝毅; CHIOU, LIH-YIH;Chien, Tsai-Kan;Sheu, Shyh-Shyuan;Lin, Jing-Cian;Lee, Chang-Chia;Ku, Tzu-Kun;Tsai, Ming-Jinn;Wu, Chih-I |
| 國立成功大學 |
2016-05-23 |
Energy-efficient nonvolatile microprocessor
|
Chiou, Lih-Yih;Chien, Tsai-Kan;Lee, Chang-Chia |
| 國立成功大學 |
2016-03-17 |
Non-volatile static random access memory
|
Chiou, Lih-Yih;Chien, Tsai-Kan;Tsou, Yi-Sung |
| 國立成功大學 |
2016-01-08 |
Thermal simulation device and method for integrated circuits
|
Chiou, Lih-Yih;Lu, Liang-Ying |
| 國立彰化師範大學 |
2010-08 |
Peak Current Reduction Using an MTCMOS Technique
|
Lu, Liang-Ying; Wu, Tsung-Yi; Chiou, Lih-Yih; Shi, Jing-Wen |
| 國立成功大學 |
2009-11 |
Energy-Efficient Dual-Edge-Triggered Level Converting Flip Flops With Symmetry in Setup Times and Insensitivity to Output Parasitics
|
Chiou, Lih-Yih; Luo, Shien-Chun |
| 國立成功大學 |
2009-08 |
System-Level Bus-Based Communication Architecture Exploration Using a Pseudoparallel Algorithm
|
Chiou, Lih-Yih; Chen, Yi-Siou; Lee, Chih-Hsien |
| 國立成功大學 |
2006-06 |
Crosstalk-insensitive via-programming ROMs using content-aware design framework
|
Chang, Meng-Fan; Chiou, Lih-Yih; Wen, Kuei-Ann |
| 國立成功大學 |
2006-02 |
A full code-patterns coverage high-speed embedded ROM using dynamic virtual guardian technique
|
Chang, Meng-Fan; Chiou, Lih-Yih; Wen, Kuei-Ann |
