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Showing items 1-8 of 8 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立交通大學 |
2018-08-21T05:53:39Z |
Dual-output switched-capacitor DC-DC converter with pseudo-three-phase swap-and-cross control and amplitude modulation mechanism
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Chen, Chia-Min; Su, Chung-Cheng; Chou, Fang-Ting; Hung, Chung-Chih |
國立交通大學 |
2017-04-21T06:56:16Z |
Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC
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Chou, Fang-Ting; Hung, Chung-Chih |
國立交通大學 |
2017-04-21T06:49:03Z |
A Novel 12-bit Current-Steering DAC with Two Reference Currents
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Chou, Fang-Ting; Chen, Zong-Yi; Chu, Hsing-Chien; Hung, Chung-Chih |
國立交通大學 |
2015-12-02T03:00:57Z |
A Novel Glitch Reduction Circuitry for Binary-Weighted DAC
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Chou, Fang-Ting; Chen, Chia-Min; Chen, Zong-Yi; Hung, Chung-Chih |
國立交通大學 |
2015-07-21T11:20:54Z |
A compact 12-bit DAC with novel bias scheme
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Chou, Fang-Ting; Hung, Chung-Chih |
國立交通大學 |
2014-12-12T02:44:30Z |
高性能之二進位式數位類比轉換器
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周芳鼎; Chou, Fang-Ting; 洪崇智; Hung, Chung-Chih |
國立交通大學 |
2014-12-08T15:35:50Z |
A low-glitch binary-weighted DAC with delay compensation scheme
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Chou, Fang-Ting; Chen, Chia-Min; Hung, Chung-Chih |
國立交通大學 |
2014-12-08T15:34:51Z |
Dual-Output Switched-Capacitor DC-DC Converter With Peseudo-Three-Phase Swap-and-Cross Control and Amplitude Modulation Mechanism
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Chen, Chia-Min; Chiang, Chun-Yen; Du, Chen-Cheng; Chou, Fang-Ting; Hung, Chung-Chih |
Showing items 1-8 of 8 (1 Page(s) Totally) 1 View [10|25|50] records per page
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