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"chou k i"
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| 國立交通大學 |
2015-07-21T08:29:37Z |
Low-Voltage InGaZnO Thin Film Transistors with Small Sub-Threshold Swing
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Cheng, C. H.; Chou, K. I.; Hsu, H. H. |
| 國立交通大學 |
2014-12-08T15:33:58Z |
Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure
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Cheng, Chun-Hu; Chou, K. I.; Zheng, Zhi-Wei; Hsu, Hsiao-Hsuan |
| 國立交通大學 |
2014-12-08T15:31:00Z |
Gate-first n-MOSFET with a sub-0.6-nm EOT gate stack
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Cheng, C. H.; Chou, K. I.; Chin, A. |
| 國立交通大學 |
2014-12-08T15:30:22Z |
Ni/GeOx/TiOy/TaN RRAM on Flexible Substrate With Excellent Resistance Distribution
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Chou, K. I.; Cheng, C. H.; Zheng, Z. W.; Liu, Ming; Chin, Albert |
| 國立交通大學 |
2014-12-08T15:30:21Z |
Achieving low sub-0.6-nm EOT in gate-first n-MOSFET with TiLaO/CeO2 gate stack
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Cheng, C. H.; Chou, K. I.; Chin, Albert |
Showing items 1-5 of 5 (1 Page(s) Totally)
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