|
English
|
正體中文
|
简体中文
|
總筆數 :0
|
|
造訪人次 :
52734135
線上人數 :
280
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"chou teyuh"的相關文件
顯示項目 1-5 / 5 (共1頁)
1
每頁顯示[10|25|50]項目
| 國立交通大學 |
2019-09-02T07:45:40Z |
Development of Three-Dimensional Synaptic Device and Neuromorphic Computing Hardware
|
Wang, I-Ting; Chou, Teyuh; Chiu, Li-Wen; Chang, Chih-Cheng; Hou, Tuo-Hung |
| 國立交通大學 |
2018-08-21T05:56:59Z |
Challenges and Opportunities toward Online Training Acceleration using RRAM-based Hardware Neural Network
|
Chang, Chih-Cheng; Liu, Jen-Chieh; Shen, Yu-Lin; Chou, Teyuh; Chen, Pin-Chun; Wang, I-Ting; Su, Chih-Chun; Wu, Ming-Hong; Hudec, Boris; Chang, Che-Chia; Tsai, Chia-Ming; Chang, Tian-Sheuan; Wong, H-S Philip; Hou, Tuo-Hung |
| 國立交通大學 |
2018-08-21T05:53:31Z |
Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network Based on Analog Resistive Synapse
|
Chang, Chih-Cheng; Chen, Pin-Chun; Chou, Teyuh; Wang, I-Ting; Hudec, Boris; Chang, Che-Chia; Tsai, Chia-Ming; Chang, Tian-Sheuan; Hou, Tuo-Hung |
| 國立交通大學 |
2018-01-24T07:39:08Z |
應用類比電阻仿生神經突觸之硬體神經網路系統實現
|
周德玉; 侯拓宏; Chou, Teyuh; Hou, Tuo-Hung |
| 國立交通大學 |
2017-04-21T06:55:21Z |
3D Ta/TaOx/TiO2/Ti synaptic array and linearity tuning of weight update for hardware neural network applications
|
Wang, I-Ting; Chang, Chih-Cheng; Chiu, Li-Wen; Chou, Teyuh; Hou, Tuo-Hung |
顯示項目 1-5 / 5 (共1頁)
1
每頁顯示[10|25|50]項目
|
