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Showing items 6-15 of 83  (9 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2018-09-10T15:00:18Z Parasitic BJT versus DIBL: Floating-Body-Related Subthreshold Characteristics of SOI NMOS Device D. H. Lung;S. K. Hu;J. B. Kuo;D. Chen; D. H. Lung; S. K. Hu; J. B. Kuo; D. Chen; JAMES-B KUO
臺大學術典藏 2018-09-10T15:00:17Z Back-Gate-Baias Induced Floating-Body-Related Subthreshold Characteristics of SOI NMOS Device S. K. Hu;D. H. Lung;J. B. Kuo;D. Chen; S. K. Hu; D. H. Lung; J. B. Kuo; D. Chen; JAMES-B KUO
臺大學術典藏 2018-09-10T15:00:17Z Back-Gate-Baias Induced Floating-Body-Related Subthreshold Characteristics of SOI NMOS Device S. K. Hu;D. H. Lung;J. B. Kuo;D. Chen; S. K. Hu; D. H. Lung; J. B. Kuo; D. Chen; JAMES-B KUO
臺大學術典藏 2018-09-10T09:50:38Z Using Offset Cancellation Circuit to Mitigate Beat-Frequency Oscillation of Phase Currents in a Multiphase Interleaved Voltage Regulator C.-H. Chiu;C.-J. Chen;D. Chen;W.-H. Chang; C.-H. Chiu; C.-J. Chen; D. Chen; W.-H. Chang; DAN CHEN
臺大學術典藏 2018-09-10T09:50:38Z Using Offset Cancellation Circuit to Mitigate Beat-Frequency Oscillation of Phase Currents in a Multiphase Interleaved Voltage Regulator C.-H. Chiu;C.-J. Chen;D. Chen;W.-H. Chang; C.-H. Chiu; C.-J. Chen; D. Chen; W.-H. Chang; DAN CHEN
臺大學術典藏 2018-09-10T09:50:25Z Function of the Upper/Lower Parasitic BJTs in 40nm PD SOI NMOS Device due to the Back-Gate Bias Effect A. P. Chuang;S. I. Su;Z. H. Yang;J. B. Kuo;D. Chen;C. S. Yeh; A. P. Chuang; S. I. Su; Z. H. Yang; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T09:50:25Z Function of the Upper/Lower Parasitic BJTs in 40nm PD SOI NMOS Device due to the Back-Gate Bias Effect A. P. Chuang;S. I. Su;Z. H. Yang;J. B. Kuo;D. Chen;C. S. Yeh; A. P. Chuang; S. I. Su; Z. H. Yang; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T09:50:25Z Turn-off Transient Behavior of PD SOI NMOS Device Considering the Back-Gate Bias Effect D. H. Lung; J. B. Kuo; D. Chen; JAMES-B KUO; D. H. Lung;J. B. Kuo;D. Chen
臺大學術典藏 2018-09-10T09:50:25Z Turn-off Transient Behavior of PD SOI NMOS Device Considering the Back-Gate Bias Effect D. H. Lung; J. B. Kuo; D. Chen; JAMES-B KUO; D. H. Lung;J. B. Kuo;D. Chen
臺大學術典藏 2018-09-10T09:25:08Z Multi-Phase Power Converter and Control Circuit and Method Thereof, C.-J. Chen;C.-S. Huang;K.-L. Tseng;D. Chen; C.-J. Chen; C.-S. Huang; K.-L. Tseng; D. Chen; DAN CHEN

Showing items 6-15 of 83  (9 Page(s) Totally)
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