臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

關於TAIR
	計畫說明

瀏覽
	典藏機構
	作者
	題名
	日期
	統計圖表
	機構即時統計
	學術趨勢

消息
	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

著作權
	出版社及期刊政策查詢
	TAIR著作權會議記錄

相關連結
	機構典藏計畫網站
	ROAR
	OpenDOAR
	SHERPA
	OAIster
	JAIRO
	Ira
	DSPACE
	RWWR
	臺大學術典藏NTU Scholars

"d chen"的相關文件

回到依作者瀏覽
依題名排序	依日期排序

顯示項目 51-83 / 83 (共2頁)
<< < 1 2
每頁顯示[10|25|50]項目

機構	日期	題名	作者
臺大學術典藏	2018-09-10T07:08:51Z	Small-signal modeling of DC converters with digital peak-current-mode control	H.-S. Nien;D. Chen;W.-H. Chang; H.-S. Nien; D. Chen; W.-H. Chang; DAN CHEN
臺大學術典藏	2018-09-10T07:08:49Z	Use of a Cz Common-Mode Capacitor in Two Wire and Three -Wire Off-Line Supplies	H.-I. Hsieh; L. Huang; T.-C. Lin; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T07:08:18Z	Breakdown Behavior of 40-nm PD-SOI NMOS Device Considering STI-Induced Mechanical Stress Effect	I. S. Lin;V. C. Su;J. B. Kuo;D. Chen;C. S. Yeh;C. T. Tsai;M. Ma; I. S. Lin; V. C. Su; J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏	2018-09-10T07:08:18Z	Breakdown Behavior of 40-nm PD-SOI NMOS Device Considering STI-Induced Mechanical Stress Effect	I. S. Lin;V. C. Su;J. B. Kuo;D. Chen;C. S. Yeh;C. T. Tsai;M. Ma; I. S. Lin; V. C. Su; J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏	2018-09-10T07:08:18Z	Shallow-trench-isolation (STI)-induced mechanical-stress-related kink-effect behaviors of 40-nm PD SOI NMOS device	I. S. Lin;V. C. Su;J. B. Kuo;R. Lee;G. S. Lin;D. Chen;C. S. Yeh;C. T. Tsai;M. Ma; I. S. Lin; V. C. Su; J. B. Kuo; R. Lee; G. S. Lin; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏	2018-09-10T07:08:18Z	Shallow-trench-isolation (STI)-induced mechanical-stress-related kink-effect behaviors of 40-nm PD SOI NMOS device	I. S. Lin;V. C. Su;J. B. Kuo;R. Lee;G. S. Lin;D. Chen;C. S. Yeh;C. T. Tsai;M. Ma; I. S. Lin; V. C. Su; J. B. Kuo; R. Lee; G. S. Lin; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏	2018-09-10T07:08:18Z	STI-Induced Mechanical-Stress-Related Kink Effect of 40nm PD SOI NMOS Devices	I. S. Lin; V. C. Su; J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏	2018-09-10T07:08:18Z	STI-Induced Mechanical Stress-Related Breakdown Behavior of 40nm PD SOI NMOS Devices	J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏	2018-09-10T06:37:18Z	A novel soft-switching bridgeless power factor correction circuit	H.-Y. Tsai; T.-H. Hsia; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T06:37:17Z	Native AVP Control Method for Constant Output Impedance of DC Power Converters	J. R. Huang; S. C. H. Wang; C. J. Lee; E. K. L. Tseng; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T06:35:00Z	STI Mechanical Stress Induced Subthreshold Kink Effect of 40nm PD SOI NMOS Devices	J. B. kuo; M. Ma; C. T. Tsai; C. S. Yeh; D. Chen; JAMES-B KUO; I. Lin; V. Su
臺大學術典藏	2018-09-10T06:35:00Z	Influence of STI-induced mechnical stress in kink effect of 65nm PD SOI CMOS devices	I. Lin; V. Su; J. Kuo; R. Lee; G. Lin; D. Chen; C. Yeh; C. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏	2018-09-10T06:02:51Z	Driver chip design considerations for VRM applications	K. B. Chen; D. Chen; J. Liu; S. Juang; DAN CHEN
臺大學術典藏	2018-09-10T06:02:50Z	A novel output voltage dip preventing circuit for synchronous buck converters	P.-Y. Chen; D. Chen; C.-W. Liu; F. Y. Shi; DAN CHEN
臺大學術典藏	2018-09-10T05:27:22Z	Hybrid Power Semiconductor Switch	D. Chen; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T05:27:22Z	Hybrid Power Semiconductor Switch	D. Chen; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T05:27:21Z	Use of a Cz Common-Mode Capacitor in 2-wire and 3-wire Off-line Power Supplies	H.-I Hsieh; T.-C. Lin; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T05:27:21Z	Simulation and Analysis of Conducted EMI for a Commercial DC/DC Power Module	P.-H. Liu; D. Chen; C.-W. Liu; S.-Y. Wang; DAN CHEN
臺大學術典藏	2018-09-10T05:27:21Z	A novel output voltage dip preventing circuit for synchronous buck converters	P.-Y. Chen; D. Chen; C.-W. Liu; F.-Y. Shi; DAN CHEN
臺大學術典藏	2018-09-10T04:59:32Z	A filter design procedure incorporating mixed-mode EMI noise for off-line switching power supplies	H.-I Hsieh; D. Chen; Q. Song; DAN CHEN
臺大學術典藏	2018-09-10T04:59:32Z	Driver chip design considerations for VRM applications	S. Chen; K. Bai; D. Chen; J. Liu; S. Juang; DAN CHEN
臺大學術典藏	2018-09-10T04:35:41Z	Passive Control Network for Remote Control of Load Output Level	J. Beddard; C. Eicheberger; D. Chen; DAN CHEN; J. Beddard;C. Eicheberger;D. Chen
臺大學術典藏	2018-09-10T04:35:41Z	Passive Control Network for Remote Control of Load Output Level	J. Beddard; C. Eicheberger; D. Chen; DAN CHEN; J. Beddard;C. Eicheberger;D. Chen
臺大學術典藏	2018-09-10T04:15:28Z	Resonant-Flyback Power Supply With Filament Winding for Magnetron and the Like Load	W. Korpnumpf;J. Park;D. Chen; W. Korpnumpf; J. Park; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T04:15:28Z	Resonant-Flyback Power Supply With Filament Winding for Magnetron and the Like Load	W. Korpnumpf;J. Park;D. Chen; W. Korpnumpf; J. Park; D. Chen; DAN CHEN
臺大學術典藏	2018-09-10T04:15:28Z	Mounting and heatsink method for piezoelectric transformer	E. M. Baker; W. Huang; D. Chen; F. C. Lee; DAN CHEN
臺大學術典藏	2013-12	Turn-on Transient Behavior of PD SOI NMOS Device Considering the Back-Gate Bias Effect	D. H. Lung;J. B. Kuo;D. Chen; D. H. Lung; J. B. Kuo; D. Chen; JAMES-B KUO
臺大學術典藏	2013-12	Turn-on Transient Behavior of PD SOI NMOS Device Considering the Back-Gate Bias Effect	D. H. Lung;J. B. Kuo;D. Chen; D. H. Lung; J. B. Kuo; D. Chen; JAMES-B KUO
臺大學術典藏	2012-04	Function of the parasitic bipolar transistor in the 40 nm PD SOI NMOS device considering the floating body effect	C. H. Chen;J. B. Kuo;D. Chen;C. S. Yeh; C. H. Chen; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏	2012-04	Function of the parasitic bipolar transistor in the 40 nm PD SOI NMOS device considering the floating body effect	C. H. Chen;J. B. Kuo;D. Chen;C. S. Yeh; C. H. Chen; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏	2010-06	A New On-Time Adjustment Scheme for the Reduction of Input Current Distortion of Critical-Mode Power Factor Correction Boost Converters	D. Chen; C.-S. Huang; C.-Y. Liu; K.-H. Liu; DAN CHEN; S.-H. Tang;D. Chen;C.-S. Huang;C.-Y. Liu;K.-H. Liu; S.-H. Tang
臺大學術典藏	2010-06	A New On-Time Adjustment Scheme for the Reduction of Input Current Distortion of Critical-Mode Power Factor Correction Boost Converters	D. Chen; C.-S. Huang; C.-Y. Liu; K.-H. Liu; DAN CHEN; S.-H. Tang;D. Chen;C.-S. Huang;C.-Y. Liu;K.-H. Liu; S.-H. Tang
臺大學術典藏	2008-07	Modeling and design for a Novel Adaptive Voltage Positioning (AVP) Scheme for Multiphase VRMs	M. Lee; D. Chen; K. Huang; C.-W. Liu; B. Tai; CHIH-WEN LIU; DAN CHEN

顯示項目 51-83 / 83 (共2頁)
<< < 1 2
每頁顯示[10|25|50]項目

	English \| 正體中文 \| 简体中文 \| 總筆數 :0
	造訪人次 : 50686987 線上人數 : 266 教育部委託研究計畫計畫執行:國立臺灣大學圖書館