English  |  正體中文  |  简体中文  |  2817115  
???header.visitor??? :  27648467    ???header.onlineuser??? :  662
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

"d m kwai"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1??? ???jsp.browse.items-by-author.order2???

Showing items 1-12 of 12  (1 Page(s) Totally)
1 
View [10|25|50] records per page

Institution Date Title Author
臺大學術典藏 2018-09-10T09:25:29Z An MCT-Based Bit-Weight Extraction Technique for Embedded SAR ADC Testing and Calibration X.-L. Huang;J.-L. Huang;H.-I. Chen;C.-Y. Chen;K.-T. Tseng;M.-F. Huang;Y.-F. Chou;D.-M. Kwai; X.-L. Huang; J.-L. Huang; H.-I. Chen; C.-Y. Chen; K.-T. Tseng; M.-F. Huang; Y.-F. Chou; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z An MCT-Based Bit-Weight Extraction Technique for Embedded SAR ADC Testing and Calibration X.-L. Huang;J.-L. Huang;H.-I. Chen;C.-Y. Chen;K.-T. Tseng;M.-F. Huang;Y.-F. Chou;D.-M. Kwai; X.-L. Huang; J.-L. Huang; H.-I. Chen; C.-Y. Chen; K.-T. Tseng; M.-F. Huang; Y.-F. Chou; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z A SAR ADC missing-decision level detection and removal technique X.-L. Huang;J.-L. Huang;Y.-F. Chou;D.-M. Kwai; X.-L. Huang; J.-L. Huang; Y.-F. Chou; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z A SAR ADC missing-decision level detection and removal technique X.-L. Huang;J.-L. Huang;Y.-F. Chou;D.-M. Kwai; X.-L. Huang; J.-L. Huang; Y.-F. Chou; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z A self-testing and calibration method for embedded successive approximation register ADC X.-L. Huang; P.-Y. Kang; H.-M. Chang; J.-L. Huang; Y.-F. Chou; Y.-P. Lee; D.-M. Kwai; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z A pre- and post-bond self-testing and calibration methodology for SAR ADC Array in 3-D Imager X.-L. Huang; P.-Y. Kang; J.-L. Huang; Y.-F. Chou; Y.-P. Lee; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:07Z An Error Tolerance Scheme for 3D CMOS Imagers H.-M. Sherman Chang;J.-L. Huang;D.-M. Kwai;K.-T. Tim Cheng;C.-W. Wu; H.-M. Sherman Chang; J.-L. Huang; D.-M. Kwai; K.-T. Tim Cheng; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:07Z An Error Tolerance Scheme for 3D CMOS Imagers H.-M. Sherman Chang;J.-L. Huang;D.-M. Kwai;K.-T. Tim Cheng;C.-W. Wu; H.-M. Sherman Chang; J.-L. Huang; D.-M. Kwai; K.-T. Tim Cheng; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:06Z 3D-PIC: An Error Tolerant 3D CMOS Imager H.-M. Sherman Chang;J.-L. Huang;D.-M. Kwai;K.-T. Tim Cheng;C.-W. Wu; H.-M. Sherman Chang; J.-L. Huang; D.-M. Kwai; K.-T. Tim Cheng; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:06Z 3D-PIC: An Error Tolerant 3D CMOS Imager H.-M. Sherman Chang;J.-L. Huang;D.-M. Kwai;K.-T. Tim Cheng;C.-W. Wu; H.-M. Sherman Chang; J.-L. Huang; D.-M. Kwai; K.-T. Tim Cheng; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2013-03 A Low-Cost Error Tolerance Scheme for 3-D CMOS Imagers D.-M. Kwai; K.-T. Cheng; C.-W. Wu; JIUN-LANG HUANG; J.-L. Huang; H.-M. Chang; H.-M. Chang;J.-L. Huang;D.-M. Kwai;K.-T. Cheng;C.-W. Wu
臺大學術典藏 2013-03 A Low-Cost Error Tolerance Scheme for 3-D CMOS Imagers D.-M. Kwai; K.-T. Cheng; C.-W. Wu; JIUN-LANG HUANG; J.-L. Huang; H.-M. Chang; H.-M. Chang;J.-L. Huang;D.-M. Kwai;K.-T. Cheng;C.-W. Wu

Showing items 1-12 of 12  (1 Page(s) Totally)
1 
View [10|25|50] records per page