|
English
|
正體中文
|
简体中文
|
Total items :2826152
|
|
Visitors :
31810682
Online Users :
772
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"dehng guang kaai"
Showing items 1-5 of 5 (1 Page(s) Totally)
1
View [10|25|50] records per page
| 國立臺灣大學 |
2001-05 |
A fast-lock mixed-mode DLL using a 2-b SAR algorithm
|
Dehng, Guang-Kaai; Lin, Jyh-Woei; Liu, Shen-Iuan |
| 國立臺灣大學 |
2001 |
Low-Voltage CMOS Frequency Synthesizer for ERMES Pager Application
|
Hsu, June-Ming; Dehng, Guang-Kaai; Yang, Ching-Yuan; Yang, Chu-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
A 900-MHz/1-V CMOS frequency synthesizer
|
Dehng, Guang-Kaai; Yang, Ching-Yuan; Hsu, June-Ming; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
Clock-deskew buffer using a SAR-controlled delay-locked loop
|
Dehng, Guang-Kaai; Hsu, June-Ming; Yang, Ching-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
1997-09 |
High-speed divide-by-4/5 counter for a dual-modulus prescaler
|
Yang, Ching-Yuan; Dehng, Guang-Kaai; Liu, Shen-Iuan |
Showing items 1-5 of 5 (1 Page(s) Totally)
1
View [10|25|50] records per page
|
