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Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立臺灣大學 |
2001-05 |
A fast-lock mixed-mode DLL using a 2-b SAR algorithm
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Dehng, Guang-Kaai; Lin, Jyh-Woei; Liu, Shen-Iuan |
國立臺灣大學 |
2001 |
Low-Voltage CMOS Frequency Synthesizer for ERMES Pager Application
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Hsu, June-Ming; Dehng, Guang-Kaai; Yang, Ching-Yuan; Yang, Chu-Yuan; Liu, Shen-Iuan |
國立臺灣大學 |
2000 |
A 900-MHz/1-V CMOS frequency synthesizer
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Dehng, Guang-Kaai; Yang, Ching-Yuan; Hsu, June-Ming; Liu, Shen-Iuan |
國立臺灣大學 |
2000 |
Clock-deskew buffer using a SAR-controlled delay-locked loop
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Dehng, Guang-Kaai; Hsu, June-Ming; Yang, Ching-Yuan; Liu, Shen-Iuan |
國立臺灣大學 |
1997-09 |
High-speed divide-by-4/5 counter for a dual-modulus prescaler
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Yang, Ching-Yuan; Dehng, Guang-Kaai; Liu, Shen-Iuan |
Showing items 1-5 of 5 (1 Page(s) Totally) 1 View [10|25|50] records per page
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